Aspects of this disclosure relate to an amplification circuit that includes a stacked amplifier and a bias circuit. The stacked amplifier includes at least a first transistor and a second transistor in series with each other. The stacked amplifier is operable in at least a first mode and a second mode. The bias circuit is configured to bias the second transistor to a linear region of operation in the first mode and to bias the second transistor as a switch in the second mode. In certain embodiments, the amplification circuit can be a power amplifier stage configured to receive a supply voltage that has a different voltage level in the first mode than in the second mode.

Aspects of this disclosure relate to an amplification circuit that includes a stacked amplifier and a bias circuit. The stacked amplifier includes at least a first transistor and a second transistor in series with each other. The stacked amplifier is operable in at least a first mode and a second mode. The bias circuit is configured to bias the second transistor to a linear region of operation in the first mode and to bias the second transistor as a switch in the second mode. In certain embodiments, the amplification circuit can be a power amplifier stage configured to receive a supply voltage that has a different voltage level in the first mode than in the second mode.

An amplifier has an N number of input networks connected to an input terminal to receive an input signal, a first amplifier to amplify one output signal from the N number of input networks, a (N?1) number of secondary amplifiers to amplify the remaining (N?1) number of output signals, except for the one output signal, from the N number of input networks, where the amplification order of the (N?1) number of secondary amplifiers is determined based on the power level of each output signal from the N number of input networks when the first amplifier is operational, an N number of output networks which are arranged, and a first bias network to supply a D.C. bias voltage to at least one of the N number of output networks. An electrical length of the first bias network is less than 90 degrees.

An amplifier has an N number of input networks connected to an input terminal to receive an input signal, a first amplifier to amplify one output signal from the N number of input networks, a (N?1) number of secondary amplifiers to amplify the remaining (N?1) number of output signals, except for the one output signal, from the N number of input networks, where the amplification order of the (N?1) number of secondary amplifiers is determined based on the power level of each output signal from the N number of input networks when the first amplifier is operational, an N number of output networks which are arranged, and a first bias network to supply a D.C. bias voltage to at least one of the N number of output networks. An electrical length of the first bias network is less than 90 degrees.

A bipolar transistor includes a collector layer, a base layer, and an emitter layer that are formed in this order on a compound semiconductor substrate. The emitter layer is disposed inside an edge of the base layer in plan view. A base electrode is disposed on partial regions of the emitter layer and the base layer so as to extend from an inside of the emitter layer to an outside of the base layer in plan view. An insulating film is disposed between the base electrode and a portion of the base layer, with the portion not overlapping the emitter layer. An alloy layer extends from the base electrode through the emitter layer in a thickness direction and reaches the base layer. The alloy layer contains at least one element constituting the base electrode and elements constituting the emitter layer and the base layer.

A bipolar transistor includes a collector layer, a base layer, and an emitter layer that are formed in this order on a compound semiconductor substrate. The emitter layer is disposed inside an edge of the base layer in plan view. A base electrode is disposed on partial regions of the emitter layer and the base layer so as to extend from an inside of the emitter layer to an outside of the base layer in plan view. An insulating film is disposed between the base electrode and a portion of the base layer, with the portion not overlapping the emitter layer. An alloy layer extends from the base electrode through the emitter layer in a thickness direction and reaches the base layer. The alloy layer contains at least one element constituting the base electrode and elements constituting the emitter layer and the base layer.

A distributed active transformer includes an input transformer set and an output transformer set. Active stages are coupled between a transformer in the input transformer set and a transformer in the output transformer set. The input and output transformer sets are each configured as a slab transformer. The input slab transformer includes a single primary slab and many secondary slabs. The output slab transformer includes many primary slabs and a single secondary slab.

A distributed active transformer includes an input transformer set and an output transformer set. Active stages are coupled between a transformer in the input transformer set and a transformer in the output transformer set. The input and output transformer sets are each configured as a slab transformer. The input slab transformer includes a single primary slab and many secondary slabs. The output slab transformer includes many primary slabs and a single secondary slab.

A semiconductor devices comprises a first member including a first circuit partially formed by an elemental semiconductor element at a surface layer, a first conductive raised portion at the first member, and a second member smaller than the first member in plan view joined to the first member. The second member includes a second circuit partially formed by a compound semiconductor element. A second conductive raised portion is at the second member. A power amplifier includes a first-stage amplifier circuit included in the first or second circuit and a second-stage amplifier circuit included in the second circuit. The first circuit includes a first switch for inputting to the first-stage amplifier circuit a radio-frequency signal inputted to a selected contact, a control circuit to control the first- and second-stage amplifier circuits, and a second switch for outputting from a selected contact a radio-frequency signal outputted by the second-stage amplifier circuit.

Each of cells arranged on a substrate surface along a first direction includes at least one unit transistor. Collector electrodes are arranged between two adjacent cells. A first cell, which is at least one of the cells, includes unit transistors arranged along the first direction. The unit transistors are connected in parallel to each another. In the first cell, the base electrode and the emitter electrode in each unit transistor are arranged along the first direction, and the order of arrangement of the base electrode and the emitter electrode is the same among the unit transistors. When looking at one first cell, a maximum value of distances in the first direction between the emitter electrodes of two adjacent unit transistors in the first cell being looked at is shorter than ? of a shorter one of distances between the first cell being looked at and adjacent cells.