A control circuit is configured to control a Doherty amplifier including a carrier amplifier and a peak amplifier. The control circuit includes a resistor having a resistance value that is irreversibly adjustable. The resistor is configured to determine, based on the resistance value, a bias of the peak amplifier. The control circuit controls a Doherty amplifier.

A control circuit is configured to control a Doherty amplifier including a carrier amplifier and a peak amplifier. The control circuit includes a resistor having a resistance value that is irreversibly adjustable. The resistor is configured to determine, based on the resistance value, a bias of the peak amplifier. The control circuit controls a Doherty amplifier.

An amplifier module includes a module substrate with a mounting surface, a signal conducting layer, a ground layer, and a ground terminal pad at the mounting surface. A thermal dissipation structure extends through the module substrate. A ground contact of a power transistor die is coupled to a surface of the thermal dissipation structure. Encapsulant material covers the mounting surface of the module substrate and the power transistor die, and a surface of the encapsulant material defines a contact surface of the amplifier module. A ground terminal is embedded within the encapsulant material. The ground terminal has a proximal end coupled to the ground terminal pad, and a distal end exposed at the contact surface. The ground terminal is electrically coupled to the ground contact of the power transistor die through the ground terminal pad, the ground layer of the module substrate, and the thermal dissipation structure.

An amplifier module includes a module substrate with a mounting surface, a signal conducting layer, a ground layer, and a ground terminal pad at the mounting surface. A thermal dissipation structure extends through the module substrate. A ground contact of a power transistor die is coupled to a surface of the thermal dissipation structure. Encapsulant material covers the mounting surface of the module substrate and the power transistor die, and a surface of the encapsulant material defines a contact surface of the amplifier module. A ground terminal is embedded within the encapsulant material. The ground terminal has a proximal end coupled to the ground terminal pad, and a distal end exposed at the contact surface. The ground terminal is electrically coupled to the ground contact of the power transistor die through the ground terminal pad, the ground layer of the module substrate, and the thermal dissipation structure.

Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit.

Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit.

A Radio Frequency (RF) circuit including a receive path, a transmit path, a switching circuit, and an output configured to receive RF signals from an antenna in a receive mode of operation, and to provide RF signals to the antenna in a transmit mode of operation. The receive path is configured to be coupled between a low-noise amplifier and the output. The switching circuit is located in the receive path and is configured, in the receive mode, to selectively couple the low-noise amplifier to the output and to pass the received RF signals from the output to the low-noise amplifier. The transmit path is configured to be coupled between a power amplifier and the output, to provide, in the transmit mode, signals from the power amplifier to the output, bypassing the switching circuit, and to have, in receive mode of operation, an off-state impedance of at least 200+j*13 Ohm.

A Radio Frequency (RF) circuit including a receive path, a transmit path, a switching circuit, and an output configured to receive RF signals from an antenna in a receive mode of operation, and to provide RF signals to the antenna in a transmit mode of operation. The receive path is configured to be coupled between a low-noise amplifier and the output. The switching circuit is located in the receive path and is configured, in the receive mode, to selectively couple the low-noise amplifier to the output and to pass the received RF signals from the output to the low-noise amplifier. The transmit path is configured to be coupled between a power amplifier and the output, to provide, in the transmit mode, signals from the power amplifier to the output, bypassing the switching circuit, and to have, in receive mode of operation, an off-state impedance of at least 200+j*13 Ohm.

This disclosure relates to a signal generating circuit and an audio processing device. The circuit includes a switch module, a voltage producing module, and a signal generating module; the switch module is connected to the voltage producing module, including at least one control switch, and is used for receiving a frequency division signal. Based on the frequency division signal, the at least one control switch is turned on or turned off; the voltage producing module is separately connected to the switch module and the signal generating module and used for producing a first voltage and a second voltage. The at least one control switch controls the first voltage and the second voltage to change. The signal generating module is connected to the voltage producing module and used for generating a carrier signal with the same frequency as the frequency division signal according to the received first and second voltages.

Example embodiments relate to power amplifier devices and semiconductor dies. One example power amplifier device includes a semiconductor die having a first input terminal and a first output terminal. The power amplifier device also includes a power transistor integrated on the semiconductor die and including a second input terminal and a second output terminal arranged at an input side and output side of the power transistor, respectively. The power transistor has an output capacitance. Further, the power amplifier device includes a shunt network that includes a plurality of first bondwires arranged in series with a first capacitor. The first capacitor is arranged near the input side of the power transistor. At one end of the shunt network one end of the plurality of first bondwires is coupled to the second output terminal. Additionally, the power amplifier includes a pair of coupled lines formed on the semiconductor die.