Example embodiments relate to power amplifier devices and semiconductor dies. One example power amplifier device includes a semiconductor die having a first input terminal and a first output terminal. The power amplifier device also includes a power transistor integrated on the semiconductor die and including a second input terminal and a second output terminal arranged at an input side and output side of the power transistor, respectively. The power transistor has an output capacitance. Further, the power amplifier device includes a shunt network that includes a plurality of first bondwires arranged in series with a first capacitor. The first capacitor is arranged near the input side of the power transistor. At one end of the shunt network one end of the plurality of first bondwires is coupled to the second output terminal. Additionally, the power amplifier includes a pair of coupled lines formed on the semiconductor die.

Disclosed in the present invention are a balanced radio frequency power amplifier, a chip and a communication terminal. The radio frequency power amplifier divides, by means of a 90-degree power splitter unit, a radio frequency input signal into two equal-amplitude signals having a phase difference of 90 degrees, the two radio frequency input signals are amplified and then inputted into an adjustable 90-degree power combiner, and the values of a adjustable capacitor and an adjustable resistor in the adjustable 90-degree power combiner are controlled by means of a control unit, so as to synthesize the two radio frequency input signals into one radio frequency input signal when the phase difference and amplitude difference of the two signals at different frequencies are the smallest, and to input the radio frequency input signal into a circuit of the next stage by means of a specific radio frequency transmission path.

Disclosed in the present invention are a balanced radio frequency power amplifier, a chip and a communication terminal. The radio frequency power amplifier divides, by means of a 90-degree power splitter unit, a radio frequency input signal into two equal-amplitude signals having a phase difference of 90 degrees, the two radio frequency input signals are amplified and then inputted into an adjustable 90-degree power combiner, and the values of a adjustable capacitor and an adjustable resistor in the adjustable 90-degree power combiner are controlled by means of a control unit, so as to synthesize the two radio frequency input signals into one radio frequency input signal when the phase difference and amplitude difference of the two signals at different frequencies are the smallest, and to input the radio frequency input signal into a circuit of the next stage by means of a specific radio frequency transmission path.

A power amplification device includes: a first semiconductor chip including a first main surface and a second main surface; a first field-effect transistor, a first drain finger part, a plurality of first gate finger parts, and a source finger part; a sub-mount substrate including a third main surface and a fourth main surface; and a first filled via provided penetrating from the third main surface to the fourth main surface. In plan view, the first filled via has a rectangular shape. A long side direction of the first filled via is parallel to a long side direction of the plurality of first gate finger parts. In plan view, the first filled via is positioned to overlap part of one first gate finger part included in the plurality of first gate finger parts.

A power amplification device includes: a first semiconductor chip including a first main surface and a second main surface; a first field-effect transistor, a first drain finger part, a plurality of first gate finger parts, and a source finger part; a sub-mount substrate including a third main surface and a fourth main surface; and a first filled via provided penetrating from the third main surface to the fourth main surface. In plan view, the first filled via has a rectangular shape. A long side direction of the first filled via is parallel to a long side direction of the plurality of first gate finger parts. In plan view, the first filled via is positioned to overlap part of one first gate finger part included in the plurality of first gate finger parts.

Systems and devices are provided for tracking pullup current generated by power amplifiers regardless of variations in PVT conditions. An apparatus may include one or more power amplifiers that powers components of the apparatus, a tracking circuit, and a pulse generation circuit. The tracking circuit may include an amplifier. Further, the tracking circuit may include pullup current tracking circuitry that is coupled to the amplifier and generates a first current that tracks pullup current generated by the one or more power amplifiers. Furthermore, the pulse generation circuit may include pullup current generator circuitry that generates a second current that mirrors the first current. In addition, the pulse generation circuit may also include pulse generator circuitry that is coupled to the pullup current generator circuitry and that generates a pulse to control operation of the one or more power amplifiers based at least in part on the second current.

Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are presented, where the amplifier can have a varying supply voltage. According to one aspect, the gate of the input transistor of the amplifier is biased with a fixed voltage whereas the gates of the other transistors of the amplifier are biased with variable voltages that are linear functions of the varying supply voltage. According to another aspect, the linear functions are such that the variable voltages coincide with the fixed voltage at a value of the varying supply voltage for which the input transistor is at the edge of triode. According to another aspect, biasing of the stacked transistors is such that, while the supply voltage varies, the drain-to-source voltage of the input transistor is maintained to a fixed value whereas the drain-to-source voltages of all other transistors are equal to one another.

Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are presented, where the amplifier can have a varying supply voltage. According to one aspect, the gate of the input transistor of the amplifier is biased with a fixed voltage whereas the gates of the other transistors of the amplifier are biased with variable voltages that are linear functions of the varying supply voltage. According to another aspect, the linear functions are such that the variable voltages coincide with the fixed voltage at a value of the varying supply voltage for which the input transistor is at the edge of triode. According to another aspect, biasing of the stacked transistors is such that, while the supply voltage varies, the drain-to-source voltage of the input transistor is maintained to a fixed value whereas the drain-to-source voltages of all other transistors are equal to one another.

An amplifier includes a semiconductor die and a substrate that is distinct from the semiconductor die. The semiconductor die includes a III-V semiconductor substrate, a first RF signal input terminal, a first RF signal output terminal, and a transistor (e.g., a GaN FET). The transistor has a control terminal electrically coupled to the first RF signal input terminal, and a current-carrying terminal electrically coupled to the first RF signal output terminal. The substrate includes a second RF signal input terminal, a second RF signal output terminal, circuitry coupled between the second RF signal input terminal and the second RF signal output terminal, and an electrostatic discharge (ESD) protection circuit. The amplifier also includes a connection electrically coupled between the ESD protection circuit and the control terminal of the transistor. The substrate may be another semiconductor die (e.g., with a driver transistor and/or impedance matching circuitry) or an integrated passive device.

An output matching circuit includes: a converter electrically connected to an output end of a power amplifier element to convert an impedance of the output end to an impedance higher than the impedance of the output end by magnetic coupling; and a first filter circuit electrically connected between the output end of the power amplifier element and the converter to make a short circuit in a frequency band different from a predetermined transmission frequency band.