Patent classifications
H03F3/213
Power amplifier equalizer
Circuits and methods for achieving good AM-AM and AM-PM metrics while achieving good power, PAE, linearity, and EVM performance in an amplifier. Embodiments provide an equalization approach which compensates for AM-AM and AM-PM variations in an amplifier by controlling bias voltage versus output power to alter the AM-AM and AM-PM profiles imposed by the amplifier. Differential amplifier embodiments include cross-coupled common-gate transistors that generate an equalization voltage that alters the gate bias voltage of respective main FETs in proportion to a power level present at the respective drains of the main FETs. Single-ended amplifier embodiments include an equalization circuit that alters the bias voltage to the gate of a main FET in proportion to a power level present at the main FET drain. Embodiments may also include a linearization circuit which alters the AM-PM profile of an input signal to compensate for the AM-PM profile imposed by a coupled amplifier.
Common-mode compensation in a multi-level pulse-width modulation system
A system for sensing an electrical quantity may include a sensing stage configured to sense the electrical quantity and generate a sense signal indicative of the electrical quantity, wherein the electrical quantity is indicative of an electrical signal generated by a Class-DG amplifier configured to drive a load wherein the Class-DG amplifier has multiple signal-level common modes and a common-mode compensator configured to compensate for changes to a common-mode voltage of a differential supply voltage of the driver occurring when switching between signal-level common modes of the Class-DG amplifier.
TEMPERATURE CORRECTION FOR RADIO-FREQUENCY CIRCUITS
In some embodiments, a radio-frequency system can include a die having a semiconductor substrate and including a radio-frequency circuit and a sensor implemented thereon. The radio-frequency system can further include another die having a semiconductor substrate and including a control circuit for controlling the radio-frequency circuit and a sensor implemented thereon. The control circuit can be configured to receive sensed information from the sensor of the die with the radio-frequency circuit and sensed information from the sensor of the die with the control circuit, and to be capable of adjusting operation of the radio-frequency circuit based on the sensed information from either or both of the sensors. In some embodiments, the radio-frequency system can be implemented as part of a packaged module.
TEMPERATURE CORRECTION FOR RADIO-FREQUENCY CIRCUITS
In some embodiments, a radio-frequency system can include a die having a semiconductor substrate and including a radio-frequency circuit and a sensor implemented thereon. The radio-frequency system can further include another die having a semiconductor substrate and including a control circuit for controlling the radio-frequency circuit and a sensor implemented thereon. The control circuit can be configured to receive sensed information from the sensor of the die with the radio-frequency circuit and sensed information from the sensor of the die with the control circuit, and to be capable of adjusting operation of the radio-frequency circuit based on the sensed information from either or both of the sensors. In some embodiments, the radio-frequency system can be implemented as part of a packaged module.
Semiconductor-on-insulator transistor layout for radio frequency power amplifiers
A semiconductor-on-insulator die includes a substrate layer, an active layer, an insulator layer between the substrate layer and the active layer, a first metal layer, and a first via layer between the active layer and the first metal layer. The die includes at least one contact pad and a transistor including a first terminal formed within the active layer. A conduction path can include a plurality of first conduction path portions extending between the first terminal and the at least one contact pad and residing within a footprint of the at least one contact pad.
Semiconductor-on-insulator transistor layout for radio frequency power amplifiers
A semiconductor-on-insulator die includes a substrate layer, an active layer, an insulator layer between the substrate layer and the active layer, a first metal layer, and a first via layer between the active layer and the first metal layer. The die includes at least one contact pad and a transistor including a first terminal formed within the active layer. A conduction path can include a plurality of first conduction path portions extending between the first terminal and the at least one contact pad and residing within a footprint of the at least one contact pad.
POWER AMPLIFIER SYSTEMS WITH FREQUENCY RESPONSE COMPENSATION
A power amplification system is provided comprising: a power amplifier circuit, the power amplifier circuit including a plurality of transistors; and a frequency response compensation circuit for providing a plurality of values of capacitance. The frequency response compensation circuit having at least one tuning capacitor. Each of the at least one tuning capacitors is coupled to a tuning switch for regulating the current path to and/or from the corresponding capacitor to control the value of the capacitance provided by the frequency response compensation circuit. The frequency response compensation circuit is coupled to at least two of the transistors of the power amplifier circuit. The frequency response compensation circuit is configured to reduce variation over frequency of a load impedance of the power amplification system. A wireless device comprising such a power amplification system is also provided. A wireless module comprising such a power amplification system is also provided.
POWER AMPLIFIER SYSTEMS WITH FREQUENCY RESPONSE COMPENSATION
A power amplification system is provided comprising: a power amplifier circuit, the power amplifier circuit including a plurality of transistors; and a frequency response compensation circuit for providing a plurality of values of capacitance. The frequency response compensation circuit having at least one tuning capacitor. Each of the at least one tuning capacitors is coupled to a tuning switch for regulating the current path to and/or from the corresponding capacitor to control the value of the capacitance provided by the frequency response compensation circuit. The frequency response compensation circuit is coupled to at least two of the transistors of the power amplifier circuit. The frequency response compensation circuit is configured to reduce variation over frequency of a load impedance of the power amplification system. A wireless device comprising such a power amplification system is also provided. A wireless module comprising such a power amplification system is also provided.
POWER AMPLIFIER SYSTEMS WITH LOAD CONTROL
A power amplification system is provided comprising: a power amplifier circuit; an output power control circuit for providing a plurality of values of capacitance, and a balun coupled to the power amplifier circuit and to the output power control circuit. The output power control circuit includes at least one load control capacitor. Each of the at least one load control capacitors is coupled to a load control switch for regulating the current path to and/or from the corresponding capacitor to control the value of the capacitance provided by the output power control circuit. A wireless device comprising such a power amplification system is also provided. A wireless module comprising such a power amplification system is also provided.
Parallel cascode amplifier for enhanced low-power mode efficiency
In some embodiments, a power amplification system can comprise a current source, an input switch configured to alternatively feed current from the current source to a high-power circuit path and a low-power circuit path, and a band switch including a switch arm for switching between a plurality of bands. Each of the high-power circuit path and the low-power circuit path can be connected to the switch arm.