Patent classifications
H03F3/213
PARALLEL CASCODE AMPLIFIER FOR ENHANCED LOW-POWER MODE EFFICIENCY
In some embodiments, a power amplification system can comprise a current source, an input switch configured to alternatively feed current from the current source to a high-power circuit path and a low-power circuit path, and a band switch including a switch arm for switching between a plurality of bands. Each of the high-power circuit path and the low-power circuit path can be connected to the switch arm.
PARALLEL CASCODE AMPLIFIER FOR ENHANCED LOW-POWER MODE EFFICIENCY
In some embodiments, a power amplification system can comprise a current source, an input switch configured to alternatively feed current from the current source to a high-power circuit path and a low-power circuit path, and a band switch including a switch arm for switching between a plurality of bands. Each of the high-power circuit path and the low-power circuit path can be connected to the switch arm.
Power amplifier for an antenna
According to an example aspect of the present invention, there is provided an apparatus for an antenna, comprising, a first power amplifier and a second power amplifier and a common ground between the first power amplifier and the second power amplifier, wherein a Radio Frequency, RF, output of the first power amplifier is coupled to the common ground and a RF output of the second power amplifier is coupled to the common ground.
DIFFERENTIAL SOURCE FOLLOWER WITH CURRENT STEERING DEVICES
Describe is a buffer which comprises: a differential source follower coupled to a first input and a second input; first and second current steering devices coupled to the differential source follower; and a current source coupled to the first and second current steering devices. The buffer provides high supply noise rejection ratio (PSRR) together with high bandwidth.
DIFFERENTIAL SOURCE FOLLOWER WITH CURRENT STEERING DEVICES
Describe is a buffer which comprises: a differential source follower coupled to a first input and a second input; first and second current steering devices coupled to the differential source follower; and a current source coupled to the first and second current steering devices. The buffer provides high supply noise rejection ratio (PSRR) together with high bandwidth.
Radio frequency receiver, radio frequency transmitter, and communications device
A radio frequency transmitter includes N transmit channels, where each transmit channel includes one nonlinear module, a primary correction circuit, coupled to each of N nonlinear modules that correspond to the N transmit channels, and configured to provide a primary correction signal for the N nonlinear modules, and N secondary correction circuits, where the N secondary correction circuits are coupled to the N nonlinear modules respectively, and each secondary correction circuit is configured to provide a secondary correction signal for a nonlinear module coupled to the secondary correction circuit.
Radio frequency receiver, radio frequency transmitter, and communications device
A radio frequency transmitter includes N transmit channels, where each transmit channel includes one nonlinear module, a primary correction circuit, coupled to each of N nonlinear modules that correspond to the N transmit channels, and configured to provide a primary correction signal for the N nonlinear modules, and N secondary correction circuits, where the N secondary correction circuits are coupled to the N nonlinear modules respectively, and each secondary correction circuit is configured to provide a secondary correction signal for a nonlinear module coupled to the secondary correction circuit.
Amplifier device
An amplifier device includes an amplifying unit and a bias module. The amplifying unit has a first end coupled to a voltage source configured to receive a source voltage, a second end configured to receive an input signal, and a third end coupled to a first reference potential terminal configured to receive a first reference potential. The first end of the amplifying unit is configured to output an output signal amplified by the amplifying unit. The bias module is coupled to the second end of the amplifying unit, and configured to receive a voltage signal to generate a bias current according to a first counter-gradient and a second counter-gradient, and provide the bias current to the amplifying unit. The voltage signal is a variable voltage. A supply current flowing into the amplifying unit and is adjusted in accordance with the voltage signal to stay within a predetermined range.
Amplifier device
An amplifier device includes an amplifying unit and a bias module. The amplifying unit has a first end coupled to a voltage source configured to receive a source voltage, a second end configured to receive an input signal, and a third end coupled to a first reference potential terminal configured to receive a first reference potential. The first end of the amplifying unit is configured to output an output signal amplified by the amplifying unit. The bias module is coupled to the second end of the amplifying unit, and configured to receive a voltage signal to generate a bias current according to a first counter-gradient and a second counter-gradient, and provide the bias current to the amplifying unit. The voltage signal is a variable voltage. A supply current flowing into the amplifying unit and is adjusted in accordance with the voltage signal to stay within a predetermined range.
RADIO FREQUENCY TRANSISTOR AMPLIFIERS HAVING WIDENED AND/OR ASYMMETRIC SOURCE/DRAIN REGIONS FOR IMPROVED ON-RESISTANCE PERFORMANCE
A gallium nitride-based RF transistor amplifier comprises a semiconductor layer structure comprising a barrier layer on a channel layer, first and second source/drain regions in the semiconductor layer structure, first and second source/drain contacts on the respective first and second source/drain regions, and a longitudinally-extending gate finger that is between the first and second source/drain contacts. The first and second source/drain contacts each has an inner sidewall that faces the gate finger and an opposed outer sidewall. The first source/drain region extends a first distance from a lower edge of the inner sidewall of the first source/drain contact towards the second source/drain region along a transverse axis that extends parallel to a plane defined by the upper surface of the semiconductor layer structure, and extends a second, smaller distance from a lower edge of the outer sidewall of the first source/drain contact away from the second source/drain region.