Components of a power amplifier controller may support lower voltages than the power amplifier itself. As a result, a surge protection circuit that prevents a power amplifier from being damaged due to a power surge may not effectively protect the power amplifier controller. Embodiments disclosed herein present an overvoltage protection circuit that prevents a charge-pump from providing a voltage to a power amplifier controller during a detected surge event. By separately detecting and preventing a voltage from being provided to the power amplifier controller during a surge event, the power amplifier controller can be protected regardless of whether the surge event results in a voltage that may damage the power amplifier. Further, embodiments of the overvoltage protection circuit can prevent a surge voltage from being provided to a power amplifier operating in 2G mode.

A circuit (200) for testing failure of a connection between a radio frequency, RF, integrated circuit (201) and external circuitry (204), the circuit comprising: an amplifier (205) having first and second input paths (215, 216) and first and second output paths (206, 207); a first power detector (208, 209) coupled to one of said first or second output paths; at least one connection (211) between said first and second output paths (206, 207) and said external circuitry (204), connecting said outputs to a RF combiner (210) said external circuitry; at least one disabling circuit (230, 232, 234, 236, 240, 242, 260, 262) coupled to at least one of said first and second output paths (206, 207) or at least one of said first and second input path (215, 216), before said path reaches said power detector (208, 209); for disabling one of said inputs or outputs; wherein when said input or output path is disabled (206, 207), and a signal is output along the enabled output path (206, 207), the power detector (208, 209) on said disabled output path can detect if there is a failure in said at least one connection (211).

A circuit (200) for testing failure of a connection between a radio frequency, RF, integrated circuit (201) and external circuitry (204), the circuit comprising: an amplifier (205) having first and second input paths (215, 216) and first and second output paths (206, 207); a first power detector (208, 209) coupled to one of said first or second output paths; at least one connection (211) between said first and second output paths (206, 207) and said external circuitry (204), connecting said outputs to a RF combiner (210) said external circuitry; at least one disabling circuit (230, 232, 234, 236, 240, 242, 260, 262) coupled to at least one of said first and second output paths (206, 207) or at least one of said first and second input path (215, 216), before said path reaches said power detector (208, 209); for disabling one of said inputs or outputs; wherein when said input or output path is disabled (206, 207), and a signal is output along the enabled output path (206, 207), the power detector (208, 209) on said disabled output path can detect if there is a failure in said at least one connection (211).

In an embodiment, a device for generating a first current from a second current, comprises: an output transistor configured to generate the first current; a first circuit configured to generate a third current representative of the second current and to draw it from a first node; a second circuit configured to generate a fourth current representative of the first current and to supply it to the first node; and a third circuit receiving a fifth current representative of a difference between the third and fourth currents, the third circuit being configured to generate a sixth current representative of the fifth current and to draw it from a control terminal of the output transistor.

Various embodiments of the present technology may comprise methods and apparatus for an amplifier circuit. Methods and apparatus for an amplifier circuit according to various aspects of the present invention may be utilized in a digital-to-analog converter. The amplifier circuit may comprise a first operational amplifier with a feedback circuit. The feedback circuit may comprise an inverting amplifier circuit.

Various embodiments of the present technology may comprise methods and apparatus for an amplifier circuit. Methods and apparatus for an amplifier circuit according to various aspects of the present invention may be utilized in a digital-to-analog converter. The amplifier circuit may comprise a first operational amplifier with a feedback circuit. The feedback circuit may comprise an inverting amplifier circuit.

Monolithic microwave integrated circuits are provided that include a substrate, a transmit/receive selection device that is formed on the substrate, a high power amplifier formed on the substrate and coupled to a first RF port of the transmit/receive selection device, a low noise amplifier formed on the substrate and coupled to a second RF port of the transmit/receive selection device and a protection circuit that is coupled to a first control port of the transmit/receive selection device.

Monolithic microwave integrated circuits are provided that include a substrate, a transmit/receive selection device that is formed on the substrate, a high power amplifier formed on the substrate and coupled to a first RF port of the transmit/receive selection device, a low noise amplifier formed on the substrate and coupled to a second RF port of the transmit/receive selection device and a protection circuit that is coupled to a first control port of the transmit/receive selection device.

A group delay optimization circuit is provided. The group delay optimization circuit receives a first signal (e.g., a voltage signal) and a second signal (e.g., a current signal). Notably, the first signal and the second signal may experience different group delays that can cause the first signal and the second signal to misalign at an amplifier circuit configured to amplify a radio frequency (RF) signal. The group delay optimization circuit is configured to determine a statistical indicator indicative of a group delay offset between the first signal and the second signal. Accordingly, the group delay optimization circuit may minimize the group delay offset by reducing the statistical indicator to below a defined threshold in one or more group delay optimization cycles. As a result, it may be possible to pre-compensate for the group delay offset in the RF signal, thus helping to improve efficiency and linearity of the amplifier circuit.

A group delay optimization circuit is provided. The group delay optimization circuit receives a first signal (e.g., a voltage signal) and a second signal (e.g., a current signal). Notably, the first signal and the second signal may experience different group delays that can cause the first signal and the second signal to misalign at an amplifier circuit configured to amplify a radio frequency (RF) signal. The group delay optimization circuit is configured to determine a statistical indicator indicative of a group delay offset between the first signal and the second signal. Accordingly, the group delay optimization circuit may minimize the group delay offset by reducing the statistical indicator to below a defined threshold in one or more group delay optimization cycles. As a result, it may be possible to pre-compensate for the group delay offset in the RF signal, thus helping to improve efficiency and linearity of the amplifier circuit.