An integrated circuit device is provided. In some examples, the integrated circuit device includes a first amplifier path, a second amplifier path coupled in parallel with the first amplifier path, a matching network coupled to the first amplifier path and the second amplifier path, and an antenna coupled to the matching network. In some such examples, the first amplifier path includes a first differential power amplifier coupled to the matching network, and the second amplifier path includes a second differential power amplifier coupled to the matching network. The integrated circuit device may further include a controller coupled to selectively enable the first amplifier path to provide a transmitter output power within a first range and to selectively enable the second amplifier path to provide a transmitter output power within a second range that is different from the first range.

An integrated circuit device is provided. In some examples, the integrated circuit device includes a first amplifier path, a second amplifier path coupled in parallel with the first amplifier path, a matching network coupled to the first amplifier path and the second amplifier path, and an antenna coupled to the matching network. In some such examples, the first amplifier path includes a first differential power amplifier coupled to the matching network, and the second amplifier path includes a second differential power amplifier coupled to the matching network. The integrated circuit device may further include a controller coupled to selectively enable the first amplifier path to provide a transmitter output power within a first range and to selectively enable the second amplifier path to provide a transmitter output power within a second range that is different from the first range.

An amplifying device includes a current generating circuit, a bias amplifying circuit, and a compensation circuit. The current generating circuit is configured to generate an internal current based on an internal voltage. The bias amplifying circuit, connected to the current generating circuit, is configured to output a bias current generated by amplifying the internal current to a power amplifying circuit. The compensation circuit, connected to the current generating circuit, is configured to adjust the internal voltage based on a bias voltage of the power amplifying circuit.

An amplifying device includes a current generating circuit, a bias amplifying circuit, and a compensation circuit. The current generating circuit is configured to generate an internal current based on an internal voltage. The bias amplifying circuit, connected to the current generating circuit, is configured to output a bias current generated by amplifying the internal current to a power amplifying circuit. The compensation circuit, connected to the current generating circuit, is configured to adjust the internal voltage based on a bias voltage of the power amplifying circuit.

An envelope tracking (ET) radio frequency (RF) front-end circuit receives a single tracking signal (e.g., Vramp) from a baseband transceiver and generates a plurality of control signals (Vcc). The control signals are created by a multiple control signal generator circuit based on a calculated load estimate for each relevant power amplifier. The load estimate may be calculated from a sensed current and voltage. By providing control signals optimized for loads presented to the power amplifiers, the overall efficiency of the transmitter is improved.

An envelope tracking (ET) radio frequency (RF) front-end circuit receives a single tracking signal (e.g., Vramp) from a baseband transceiver and generates a plurality of control signals (Vcc). The control signals are created by a multiple control signal generator circuit based on a calculated load estimate for each relevant power amplifier. The load estimate may be calculated from a sensed current and voltage. By providing control signals optimized for loads presented to the power amplifiers, the overall efficiency of the transmitter is improved.

The present disclosure relates to a new combiner/attenuator circuit that provides improved performance, specifically the combiner/attenuator circuit disclosed is capable of operating at a temperature of 4K and provides an improved frequency response and filtering.

The present disclosure relates to a new combiner/attenuator circuit that provides improved performance, specifically the combiner/attenuator circuit disclosed is capable of operating at a temperature of 4K and provides an improved frequency response and filtering.

Power amplifier assemblies and components are disclosed. According to some embodiments, a power amplifier assembly (10) is provided that includes a power amplifier (12) having a gate lead (14), a drain lead (13) and a source contact surface (15). An extended heat slug (11) is mounted against the source contact surface to conduct heat away (18) from the surface and to extend the electrical path of the source. The extended heat slug has at least a length that is greater than the length of the source contact surface.

Power amplifier assemblies and components are disclosed. According to some embodiments, a power amplifier assembly (10) is provided that includes a power amplifier (12) having a gate lead (14), a drain lead (13) and a source contact surface (15). An extended heat slug (11) is mounted against the source contact surface to conduct heat away (18) from the surface and to extend the electrical path of the source. The extended heat slug has at least a length that is greater than the length of the source contact surface.