Patent classifications
H03F3/213
RADIO FREQUENCY POWER AMPLIFIER BASED ON POWER DETECTION FEEDBACK, CHIP AND COMMUNICATION TERMINAL
Disclosed in the present invention are a radio frequency power amplifier based on power detection feedback, a chip, and a communication terminal. The radio frequency power amplifier comprises multiple stages of amplifier circuits and at least one power detection feedback circuit; the input end of the power detection feedback circuit is connected to the output end of a current stage of amplifier circuit, and the output end of the power detection feedback circuit is connected to the input ends of the current stage of amplifier circuit and at least one stage of amplifier circuit located prior to the current stage of amplifier circuit. The power detection feedback circuit generates, according to the detected output power of the current stage of amplifier circuit, a control voltage varying inversely with the output power, so that the power detection feedback circuit outputs current varying positively with the control voltage.
CIRCUIT STRUCTURE TO GENERATE BACK-GATE VOLTAGE BIAS FOR AMPLIFIER CIRCUIT, AND RELATED METHOD
Embodiments of the present disclosure provide a circuit structure. An error amplifier of the structure includes an input terminal coupled to a voltage source, a reference terminal, and an output terminal coupled to a back-gate terminal of a power amplifier. A voltage at the output terminal of the error amplifier indicates a voltage difference between the input terminal and the reference terminal. A logarithmic current source may be coupled to the reference terminal of the error amplifier, the logarithmic current being configured to generate a reference current logarithmically proportionate to a voltage level of the voltage source. A plurality of serially coupled transistor cells, having a shared substrate and coupled between the reference terminal of the error amplifier and ground, each may include a back-gate terminal coupled to the output terminal of the error amplifier.
CIRCUIT STRUCTURE TO GENERATE BACK-GATE VOLTAGE BIAS FOR AMPLIFIER CIRCUIT, AND RELATED METHOD
Embodiments of the present disclosure provide a circuit structure. An error amplifier of the structure includes an input terminal coupled to a voltage source, a reference terminal, and an output terminal coupled to a back-gate terminal of a power amplifier. A voltage at the output terminal of the error amplifier indicates a voltage difference between the input terminal and the reference terminal. A logarithmic current source may be coupled to the reference terminal of the error amplifier, the logarithmic current being configured to generate a reference current logarithmically proportionate to a voltage level of the voltage source. A plurality of serially coupled transistor cells, having a shared substrate and coupled between the reference terminal of the error amplifier and ground, each may include a back-gate terminal coupled to the output terminal of the error amplifier.
Semiconductor device
An amplifier circuit including a semiconductor element is formed on a substrate. A protection circuit formed on the substrate includes a plurality of protection diodes that are connected in series with each other, and the protection circuit is connected to an output terminal of the amplifier circuit. A pad conductive layer at least partially includes a pad for connecting to a circuit outside the substrate. The pad conductive layer and the protection circuit at least partially overlap each other in plan view.
Semiconductor device
An amplifier circuit including a semiconductor element is formed on a substrate. A protection circuit formed on the substrate includes a plurality of protection diodes that are connected in series with each other, and the protection circuit is connected to an output terminal of the amplifier circuit. A pad conductive layer at least partially includes a pad for connecting to a circuit outside the substrate. The pad conductive layer and the protection circuit at least partially overlap each other in plan view.
RF amplifier with impedance matching components monolithically integrated in transistor die
A packaged amplifier circuit includes an RF package with a die pad, and RF input and output leads extending away from the die pad opposite directions. An RF transistor die is mounted on the die pad such that a first outer edge side of the RF transistor die faces the first RF lead and a second outer edge side of the RF transistor die faces the second RF lead. A passive electrical connector is integrally formed in the RF transistor die. The passive electrical connector includes a first end connection point closer to the first outer edge side, and a second end connection point closer to the second outer edge side. A first discrete reactive device is mounted on the die pad between the first outer edge side and the first RF lead. The passive electrical connector electrically couples the first discrete reactive device to the second RF lead.
RF amplifier with impedance matching components monolithically integrated in transistor die
A packaged amplifier circuit includes an RF package with a die pad, and RF input and output leads extending away from the die pad opposite directions. An RF transistor die is mounted on the die pad such that a first outer edge side of the RF transistor die faces the first RF lead and a second outer edge side of the RF transistor die faces the second RF lead. A passive electrical connector is integrally formed in the RF transistor die. The passive electrical connector includes a first end connection point closer to the first outer edge side, and a second end connection point closer to the second outer edge side. A first discrete reactive device is mounted on the die pad between the first outer edge side and the first RF lead. The passive electrical connector electrically couples the first discrete reactive device to the second RF lead.
BROADBAND, HIGH-EFFICIENCY, NON-MODULATING POWER AMPLIFIER ARCHITECTURE
Apparatus and methods for a no-load-modulation power amplifier are described. No-load-modulation power amplifiers can comprise multiple amplifiers connected in parallel to amplify a signal that has been divided into parallel circuit branches. One of the amplifiers can operate as a main amplifier in a first amplification class and the remaining amplifiers can operate as peaking amplifiers in a second amplification class. The main amplifier can see essentially no modulation of its load between the power amplifier's fully-on and fully backed-off states. The power amplifiers can operate in symmetric and asymmetric modes. Improvements in bandwidth and drain efficiency over conventional Doherty amplifiers are obtained. Further improvements can be obtained by combining signals from the amplifiers with hybrid couplers.
BROADBAND, HIGH-EFFICIENCY, NON-MODULATING POWER AMPLIFIER ARCHITECTURE
Apparatus and methods for a no-load-modulation power amplifier are described. No-load-modulation power amplifiers can comprise multiple amplifiers connected in parallel to amplify a signal that has been divided into parallel circuit branches. One of the amplifiers can operate as a main amplifier in a first amplification class and the remaining amplifiers can operate as peaking amplifiers in a second amplification class. The main amplifier can see essentially no modulation of its load between the power amplifier's fully-on and fully backed-off states. The power amplifiers can operate in symmetric and asymmetric modes. Improvements in bandwidth and drain efficiency over conventional Doherty amplifiers are obtained. Further improvements can be obtained by combining signals from the amplifiers with hybrid couplers.
POWER AMPLIFIER CIRCUIT
A power amplifier circuit includes a power amplifier that amplifies the power of a high frequency signal, a power amplifier temperature detector circuit that includes a temperature detection element, the temperature detection element being thermally coupled with the power amplifier, a bias control signal generator circuit that generates a bias control signal for the power amplifier based on a temperature detection signal outputted from the power amplifier temperature detector circuit, and a regulator circuit that stabilizes the temperature detection signal. The power amplifier, the power amplifier temperature detector circuit, and the regulator circuit are formed in a first integrated circuit, and the bias control signal generator circuit is formed in a second integrated circuit. The substrate material (for example, GaAs) of the first integrated circuit has a higher cutoff frequency than the substrate material (for example, SOI) of the second integrated circuit.