Patent classifications
H03F3/217
A POWER DEVICE AND METHOD FOR DRIVING A LOAD
Embodiments of the invention provide a power device. The power device comprises a switch mode power conversion circuit with power semiconductors for driving a load in response to a control signal, a controller coupled to the switch mode power conversion circuit to generate the control signal based on a predetermined current profile to be provided to the load and a maximum junction temperature of the power semiconductors, and a current injector coupled to the switch mode power conversion circuit and the controller for generating an offset current. The switch mode power conversion circuit is controlled to output the predetermined current profile or an adjusted current profile in response to the control signal, and the adjusted current profile has an offset with respect to the predetermined current profile. The offset current is equal to the offset between the adjusted current profile and the predetermined current profile and further summed with the adjusted current profile to generate the predetermined current profile to flow through the load if the control signal controls the switch mode power conversion circuit to output the adjusted current profile.
Common mode voltage controller for self-boosting push pull amplifier
Various implementations include a common mode voltage controller for a self-boosting push pull amplifier. In some implementations, input signal are processed by: calculating, based upon the input signal, a maximum duty cycle to achieve a target differential in an output of the self-boosting push pull amplifier; calculating, based on the input signal, a set of control parameters associated with adjusting a common mode voltage of the output; and generating, based on the input signal, a pair of signals configured to adjust the common mode voltage of the output, wherein the pair of signals include a gain adjustment and offset based on the maximum duty cycle and the set of control parameters, and wherein the pair of signals are configured to maintain the target differential in the output of the self-boosting push pull amplifier as the common mode voltage is adjusted to a different operating point.
FAULT DETECTION SYSTEM FOR ISOLATED TWO-SWITCH EXCITER DRIVE GATE DRIVER
A generator control unit (GCU) includes a fault detection system configured to generate a direct current (DC) voltage signal based on a difference of a DC-equivalent voltage between the positive and negative exciter gate drive signals. The fault detection system further outputs a fault detection signal indicating the fault status of the gate drive integrated circuits based on a comparison between the DC average voltage signal and a threshold value.
Adaptive sample and hold circuit for signal amplifier range selection
An adaptive sample and hold circuit for signal amplifier range selection is presented. The adaptive sample and hold circuit has an input for receiving an input signal and an output for providing a sample-and-hold-voltage. It also includes a sample-and-hold-capacitor to generate the sample-and-hold-voltage from the input signal, and a range detector. The range detector is adapted to identify a range of the input signal and to adjust a voltage at the sample-and-hold-capacitor based on the range of the input signal to maintain the sample-and-hold-voltage within a predetermined voltage span.
SWITCHED INDUCTOR/TRANSFORMER FOR DUAL-BAND LOW-NOISE AMPLIFIER (LNA)
Certain aspects of the present disclosure generally relate to an amplifier configured to process signals received in different frequency bands, where at least a portion of the amplifier is shared between different modes corresponding to the different frequency bands. One example circuit generally includes an amplifier having at least one first transistor configured to amplify a first signal received in a first mode of operation (e.g., associated with a particular frequency band), and at least one second transistor configured to amplify a second signal received in a second mode of operation. The amplifier may also include a transformer comprising a primary winding and a secondary winding, and one or more switches configured to selectively couple the primary winding to the first transistor or the second transistor based on the first mode or the second mode of operation, respectively. In certain aspects, the transformer may be coupled to a transconductance circuit.
SWITCHED INDUCTOR/TRANSFORMER FOR DUAL-BAND LOW-NOISE AMPLIFIER (LNA)
Certain aspects of the present disclosure generally relate to an amplifier configured to process signals received in different frequency bands, where at least a portion of the amplifier is shared between different modes corresponding to the different frequency bands. One example circuit generally includes an amplifier having at least one first transistor configured to amplify a first signal received in a first mode of operation (e.g., associated with a particular frequency band), and at least one second transistor configured to amplify a second signal received in a second mode of operation. The amplifier may also include a transformer comprising a primary winding and a secondary winding, and one or more switches configured to selectively couple the primary winding to the first transistor or the second transistor based on the first mode or the second mode of operation, respectively. In certain aspects, the transformer may be coupled to a transconductance circuit.
COMMON GATE AMPLIFIER CIRCUIT AND POWER AMPLIFIER USING THE SAME
A power amplifier includes a common source amplifier and a common gate amplifier circuit. The common source amplifier circuit has a terminal connected to a radio frequency (RF) input terminal and uses a source terminal commonly as an input terminal and an output terminal of the power amplifier. The common gate amplifier circuit has a terminal connected to the common source amplifier circuit and another terminal connected to an RF output terminal, and uses a gate terminal commonly as the input terminal and the output terminal of the power amplifier. The common gate amplifier circuit includes a Doherty amplifier including a main power amplifier and an auxiliary power amplifier that is connected to the main power amplifier in parallel.
Scalable periphery tunable matching power amplifier
A scalable periphery tunable matching power amplifier is presented. Varying power levels can be accommodated by selectively activating or deactivating unit cells of which the scalable periphery tunable matching power amplifier is comprised. Tunable matching allows individual unit cells to see a constant output impedance, reducing need for transforming a low impedance up to a system impedance and attendant power loss. The scalable periphery tunable matching power amplifier can also be tuned for different operating conditions such as different frequencies of operation or different modes.
Audio signal amplification device
An audio signal amplification device of the disclosure includes: a delta-sigma modulation part configured to resample an input digital audio signal with a quantization number smaller than a quantization number of the digital audio signal; a pulse-width modulation part configured to convert an output signal from the delta-sigma modulation part into a pulse-width modulation signal which sets a gradation of the output signal in an amplitude direction at a gradation of a pulse width; a power amplification part configured to perform power amplification on an output signal from the pulse-width modulation part; a low-pass filter configured to diminish a component higher than a predetermined cutoff frequency, in an output signal from the power amplification part, and to output the resultant signal; and a correction processing part configured to generate a correction signal for correcting the digital audio signal. The correction processing part includes a switch configured to control coupling of the correction processing part to the low-pass filter. When the switch is on, the correction processing part couples a loudspeaker to the low-pass filter, and generates the correction signal.
Audio signal amplification device
An audio signal amplification device of the disclosure includes: a delta-sigma modulation part configured to resample an input digital audio signal with a quantization number smaller than a quantization number of the digital audio signal; a pulse-width modulation part configured to convert an output signal from the delta-sigma modulation part into a pulse-width modulation signal which sets a gradation of the output signal in an amplitude direction at a gradation of a pulse width; a power amplification part configured to perform power amplification on an output signal from the pulse-width modulation part; a low-pass filter configured to diminish a component higher than a predetermined cutoff frequency, in an output signal from the power amplification part, and to output the resultant signal; and a correction processing part configured to generate a correction signal for correcting the digital audio signal. The correction processing part includes a switch configured to control coupling of the correction processing part to the low-pass filter. When the switch is on, the correction processing part couples a loudspeaker to the low-pass filter, and generates the correction signal.