An embodiment pulse-width modulation (PWM) modulator circuit comprises a first half-bridge stage having a first output node and a second half-bridge stage having a second output node. The first output node and the second output node are configured to have an electrical load coupled therebetween to apply thereto a PWM-modulated output signal. The circuit comprises a differential stage having input nodes configured to receive an input signal applied between the input nodes and produce a differential control signal for the first half-bridge stage and the second half-bridge stage. A current comparator is arranged intermediate the differential stage and the first and second half-bridge stages. The current comparator is configured to produce a PWM-modulated drive signal to drive the half-bridge stages as a function of the input signal applied between the input nodes in the differential stage.

This application relates to amplifier circuitry and, in particular, to class-D amplifier circuits. The application describes amplifier circuitry (400) for receiving an input signal (Sin) and generating first and second driving signals (SoutP, SoutN) for driving a bridge-tied-load. The amplifier circuitry includes first and second class-D output stages (403p, 403n) for generating the first and second driving signals based on the input signal. A controller (406) controllably varies a common-mode component of the first and second driving signals based on an indication of amplitude of the first and second driving signals. The controller varies the common-mode component, at lower signal amplitudes, so the common-mode level of the first and second driving signals is moved away from an operating region that leads to distortion.

This application relates to amplifier circuitry and, in particular, to class-D amplifier circuits. The application describes amplifier circuitry (400) for receiving an input signal (Sin) and generating first and second driving signals (SoutP, SoutN) for driving a bridge-tied-load. The amplifier circuitry includes first and second class-D output stages (403p, 403n) for generating the first and second driving signals based on the input signal. A controller (406) controllably varies a common-mode component of the first and second driving signals based on an indication of amplitude of the first and second driving signals. The controller varies the common-mode component, at lower signal amplitudes, so the common-mode level of the first and second driving signals is moved away from an operating region that leads to distortion.

An audio output device includes PWM output devices, a weighting unit, a mixer, and an amplifier. The PWM output devices divide audio data into multiple parts including an upper bit part to a lower bit part, and output the multiple parts of the audio data as PWM outputs. The weighting unit weights the PWM outputs from the PWM output devices. The mixer synthesizes the PWM outputs after being weighted. The amplifier supplies an electric current to a sounding body in accordance with a synthesis result by the mixer to cause the sounding body to emit a sound.

An audio output device includes PWM output devices, a weighting unit, a mixer, and an amplifier. The PWM output devices divide audio data into multiple parts including an upper bit part to a lower bit part, and output the multiple parts of the audio data as PWM outputs. The weighting unit weights the PWM outputs from the PWM output devices. The mixer synthesizes the PWM outputs after being weighted. The amplifier supplies an electric current to a sounding body in accordance with a synthesis result by the mixer to cause the sounding body to emit a sound.

An exemplary system and method is disclosed employing a floating inverter amplifier comprising an inverter-based circuit comprising an input configured to be switchable between a floating reservoir capacitor during a first phase of operation and to a device power source during a second phase of operation. In some embodiments, the floating inverter amplifier is further configured for current reuse and dynamic bias. In other embodiments, the floating inverter amplifier is further configured with a dynamic cascode mechanism that does not need any additional bias voltage. The dynamic cascode mechanism may be used in combination with 2-step fast-settling operation to provide high-gain and high-speed noise suppression operation.

Disclosed is an RF (Radio Frequency) power source having a power supply configured to convert an AC (Alternating Current) voltage at a power supply input to a second voltage at a power supply output, and an RF generator configured to receive the second voltage at an RF generator input and to use the second voltage to produce an output RF signal at an RF generator output. According to an embodiment of the disclosure, the power supply performs the voltage conversion without galvanic isolation between the power supply input and the power supply output, which can increase energy efficiency while reducing complexity and cost as well. Instead, the RF generator is provided with galvanic isolation between the RF generator input and the RF generator output, which can be sufficient for achieving galvanic isolation between the power supply input and the RF generator output for safety reasons.

An example object of the present invention is to provide a power amplifier with better conversion efficiency. The power amplifier including a power amplifier circuit that includes: a first switching element; a second switching element; a first capacitor; and a second capacitor. The first switching element is controlled by a first PWM signal generated from an input signal. The second switching element is controlled by a second PWM signal in a reverse phase to the first PWM signal. The first capacitor is a capacitor connected in parallel to the first switching element. The second capacitor is a capacitor connected in parallel to the second switching element.

Systems and methods of multiport amplifier (MPA) implementation system, including: at least one input matrix, including a plurality of complex modulators, wherein each complex modulator is configured to receive an input channel stream, a summation logic block, configured to sum the complex product of the plurality of complex modulators, and a dual Digital to Analog (DAC) converter, configured to receive summation digital complex output from the summation logic block, a plurality of RF modulators, wherein each RF modulator is configured to receive a dual analog output as baseband I/Q branches from a corresponding DAC converter, and a plurality of amplifiers, wherein each complex amplifier is configured to receive the output of a corresponding RF Modulator for amplification to an output RF matrix.

Systems and methods include a circuit having a plurality of integrator circuits arranged in series and configured to receive an input signal at a first of the plurality of integrators and generate an output signal at a last of the plurality of integrators, a filter arranged to receive a feedback signal comprising the output signal and generate a filtered feedback signal, which is applied to the input signal before input to the first of the plurality of integrators, and a feedback signal path configured to receive the feedback signal and apply the feedback signal to an input of a second of the plurality of integrators. The circuit may include a class-D amplifier and/or a delta-sigma modulator. The input signal may include an analog audio signal that is amplifier to drive an audio speaker.