A device includes a first ramp generator having a first ramp generator output configured to provide a first ramp, a second ramp generator having a second ramp generator output configured to provide a second ramp, and a third ramp generator having a third ramp generator output configured to provide a third ramp. The first ramp is a sawtooth voltage waveform having a first common mode voltage and a first peak-to-peak voltage. The second ramp is a sawtooth voltage waveform having a second common mode voltage and a second peak-to-peak voltage. The third ramp is a sawtooth voltage waveform having a third common mode voltage and a third peak-to-peak voltage. A frequency of the second ramp is approximately equal to a frequency of the third ramp, and the frequency of the third ramp is approximately double a frequency of the first ramp.

This invention provides compact Power Amplifiers with improved efficiency of the circuitry and improved heat dissipation, together achieved much smaller enclosure size for use in modern installations requiring reduced height such as between the thin flat TV and wall, under the table or on the projector pole or in ceiling box and the like.

This invention provides compact Power Amplifiers with improved efficiency of the circuitry and improved heat dissipation, together achieved much smaller enclosure size for use in modern installations requiring reduced height such as between the thin flat TV and wall, under the table or on the projector pole or in ceiling box and the like.

In an embodiment, a method for shaping a PWM signal includes: receiving an input PWM signal; generating an output PWM signal based on the input PWM signal by: when the input PWM signal transitions with a first edge of the input PWM signal, transitioning the output PWM signal with a first edge of the output PWM signal; and when the input PWM signal transitions with a second edge before the first edge of the output PWM signal transitions, delaying a second edge of the output PWM signal based on the first edge of the output PWM signal.

In an embodiment, a method for shaping a PWM signal includes: receiving an input PWM signal; generating an output PWM signal based on the input PWM signal by: when the input PWM signal transitions with a first edge of the input PWM signal, transitioning the output PWM signal with a first edge of the output PWM signal; and when the input PWM signal transitions with a second edge before the first edge of the output PWM signal transitions, delaying a second edge of the output PWM signal based on the first edge of the output PWM signal.

There are provided a substrate on which a first integrated circuit, a first transistor, and a first inductor element are disposed, and which has a first side and a second side facing each other; a heat sink having a fifth side and a sixth side along the first side; the first integrated circuit, the first transistor, and the first inductor element are positioned in order of the first integrated circuit, the first transistor, and the first inductor element from the first side toward the second side, and the heat sink is fixed to the substrate such that a shortest distance between the fifth side and the first side is shorter than a shortest distance between the sixth side and the first side, and a shortest distance between the first integrated circuit and the fifth side is longer than a shortest distance between the first transistor and the sixth side.

There are provided a first fixing section to a third fixing section that fix a heat sink to a substrate on which a first driving circuit and a second driving circuit are disposed; the first drive circuit includes first transistor and first integrated circuit, and the second drive circuit includes second transistor and second integrated circuit, lengths of the first transistor and the second transistor in the normal direction of the substrate are longer than lengths of the first integrated circuit and the second integrated circuit, the first fixing section and the second fixing section overlap a first virtual straight line that connects the first transistor and the second transistor, and the third fixing section overlaps a second virtual straight line that connects the first integrated circuit and the second integrated circuit to each other.

An audio driver circuit includes a modulator circuit configured to receive an audio input signal and produce a first modulated digital pulse signal. The first modulated digital pulse signal has a magnitude that switches between a supply power voltage and a supply ground voltage. The audio driver circuit also includes a switched driver circuit coupled to the modulator circuit to receive the first modulated digital pulse signal and configured to provide a second modulated digital pulse signal for driving an MOS (metal oxide semiconductor) output transistor. The second modulated digital pulse signal has a same timing pattern as the first modulated digital pulse signal and has a magnitude that tracks linearly with the magnitude of the audio input signal.

A voltage converter comprising: a bootstrap circuit, comprising an output capacitor, an error amplifier, a charging control circuit and a charging circuit. The charging control circuit comprises: a detection circuit, configured to detect an output voltage of the output capacitor to generate a detection signal; and a power limiting circuit, configured to clamp an output voltage of the error amplifier to a specific range based on the detection signal . The charging circuit is configured to generate a charging signal according the output voltage of the error amplifier to the bootstrap circuit, to charge the output capacitor.

A voltage converter comprising: a bootstrap circuit, comprising an output capacitor, an error amplifier, a charging control circuit and a charging circuit. The charging control circuit comprises: a detection circuit, configured to detect an output voltage of the output capacitor to generate a detection signal; and a power limiting circuit, configured to clamp an output voltage of the error amplifier to a specific range based on the detection signal . The charging circuit is configured to generate a charging signal according the output voltage of the error amplifier to the bootstrap circuit, to charge the output capacitor.