A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a first sense resistor coupled between the first low-side switch and the ground voltage, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the first sense resistor when the first low-side switch is activated. The current sensing circuitry may also include a second sense resistor coupled between the second low-side switch and the ground voltage, such that an output current through the load causes a second sense voltage proportional to the output current across the second sense resistor when the second low-side switch is activated. The system may also include measurement circuitry configured to measure the first sense voltage and the second sense voltage to determine the output current.

A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a sense resistor, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the sense resistor. The system may additionally include a modulator for generating a differential pulse-width modulation driving signal to the first high-side switch, the second high-side switch, the first low-side switch, and the second low-side switch and pilot tone injection circuitry configured to inject a periodic pilot tone into the differential pulse-width modulation driving signal at a pilot tone frequency.

A negative feedback system architecture and a loop filter thereof are provided. The negative feedback system architecture includes a loop filter, a pulse width modulation circuit, and a driver. The loop filter includes a three-stage series integrator for receiving a signal and outputting the filtered signal. The loop filter has three in-bandwidth poles and at least two in-bandwidth zeros. The pulse width modulation circuit is electrically connected to the loop filter for receiving the filtered signal and modulating it into a pulse width modulation signal to output. The driver is electrically connected to the pulse width modulation circuit and the loop filter for receiving the pulse width modulation signal to generate an output signal to drive a load device, and the output signal is fed back to the loop filter.

A negative feedback system architecture and a loop filter thereof are provided. The negative feedback system architecture includes a loop filter, a pulse width modulation circuit, and a driver. The loop filter includes a three-stage series integrator for receiving a signal and outputting the filtered signal. The loop filter has three in-bandwidth poles and at least two in-bandwidth zeros. The pulse width modulation circuit is electrically connected to the loop filter for receiving the filtered signal and modulating it into a pulse width modulation signal to output. The driver is electrically connected to the pulse width modulation circuit and the loop filter for receiving the pulse width modulation signal to generate an output signal to drive a load device, and the output signal is fed back to the loop filter.

A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a first sense resistor coupled between the first high-side switch and the supply voltage, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the first sense resistor when the first high-side switch is activated. The current sensing circuitry may also include a second sense resistor coupled between the second high-side switch and the supply voltage, such that an output current through the load causes a second sense voltage proportional to the output current across the second sense resistor when the second high-side switch is activated. The system may also include measurement circuitry configured to measure the first sense voltage and the second sense voltage to determine the output current.

A high CMRR current monitoring circuit includes a first stage that receives a current sense signal, a voltage across a current sense resistor in series with an output of a class-D amplifier. First stage is powered by at least one floating supply and/or reference that tracks the amplifier output. First stage applies gain to the current sense signal to generate an intermediate signal. A second stage receives the intermediate signal and is powered by a ground-referenced supply and provides an amplified representation of the current sense signal. The floating supply is supplied by a capacitive-coupled power source driven by the ground-referenced supply. The second stage output may be a voltage relative to ground or a digital signal. The intermediate signal may be a current, digital signal, or amplified version of the current sense signal voltage. The first stage may be a transconductance amplifier and the second stage a transimpedance amplifier.

A class-D amplifier includes a first differential modulator circuit, a first driver circuit including a first high-side switch and a first low-side switch. An input of the first driver circuit may be coupled to a first output of the first differential modulator circuit so that the first differential modulator circuit controls the first driver circuit. The class-D amplifier may also include a second driver circuit including a second high-side switch and a second low-side switch coupling the second and control logic that selects between a single-ended operating state and a differential operating state of the class-D amplifier circuit. The control logic may selectively determine the input of the second driver circuit in conformity with a current operating state of the class-D amplifier circuit so that the first differential modulator circuit controls the second driver circuit when the differential operating state is selected.

According to one embodiment, a clipping state detecting circuit includes: a zero-cross detection circuit that detects a zero-cross point of an input signal; an output circuit that converts the input signal into a PWM signal; a clip detection circuit that detects a state in which an output of the output circuit is clipped; and a control circuit that determines a state is a clipping state when a clip time of the output of the output circuit satisfies a condition of a threshold value set in advance with respect to a non-clip time.

According to one embodiment, a clipping state detecting circuit includes: a zero-cross detection circuit that detects a zero-cross point of an input signal; an output circuit that converts the input signal into a PWM signal; a clip detection circuit that detects a state in which an output of the output circuit is clipped; and a control circuit that determines a state is a clipping state when a clip time of the output of the output circuit satisfies a condition of a threshold value set in advance with respect to a non-clip time.

According to one embodiment, a class-D amplifier including: a PWM modulator that outputs a PWM modulation signal in response to an input signal; and a drive circuit that amplifies the PWM modulation signal, and supplies it to an output end. The drive circuit includes: a first output transistor whose main current path is connected between a power source supplying end and the output end; a second output transistor having a size larger than a size of the first output transistor; and a resistance element that is connected between the main current path of the first output transistor and the output end.