H03F3/217

Filter and filtering method

A filter includes M filter circuits. The M filter circuits are sequentially cascaded from an input terminal to an output terminal, in order to generate an output signal according to an input signal, in which M is a positive integer greater than or equal to 2. The M filter circuits include at least one first filter circuit and at least one second filter circuit. Each of the at least one first filter circuit is set to be an active filter circuit, and each of the at least one second filter circuit is set to be a passive filter circuit.

Loudspeaker enhancement

A system for driving an audio speaker that has an impedance, the system comprising: a scaler having an analog input and a scaler output that is an attenuated analog input; an amplifier having an amplifier input coupled to the scaler output and an amplifier output; a current sensor having a sensor input coupled to the speaker and a sensor output, the current sensor configured to generate a sensor signal at the sensor output responsive to a current from the audio speaker; and a compensator circuit having a circuit input coupled to the sensor output and a circuit output coupled to the amplifier input, the compensator circuit configured to supply a compensation signal to the amplifier input by applying a transfer function to the sensor signal.

Loudspeaker enhancement

A system for driving an audio speaker that has an impedance, the system comprising: a scaler having an analog input and a scaler output that is an attenuated analog input; an amplifier having an amplifier input coupled to the scaler output and an amplifier output; a current sensor having a sensor input coupled to the speaker and a sensor output, the current sensor configured to generate a sensor signal at the sensor output responsive to a current from the audio speaker; and a compensator circuit having a circuit input coupled to the sensor output and a circuit output coupled to the amplifier input, the compensator circuit configured to supply a compensation signal to the amplifier input by applying a transfer function to the sensor signal.

System and method for experiencing music via vibrations
11140472 · 2021-10-05 · ·

A technique for enabling a person to experience music haptically includes splitting an audio signal representing music into an original low-frequency band and at least one high-frequency band, and translating each high-frequency band into a corresponding synthesized low-frequency band. The original low-frequency-band signal and each synthesized low-frequency-band signal is used to excite a respective exciter, which can produce vibrations corresponding to the received signal. By placing the exciters in contact with or proximate to the body of a person, the person can experience the music, including not only the low-frequency components of the music but also, at least to some extent, the high-frequency components.

System and method for experiencing music via vibrations
11140472 · 2021-10-05 · ·

A technique for enabling a person to experience music haptically includes splitting an audio signal representing music into an original low-frequency band and at least one high-frequency band, and translating each high-frequency band into a corresponding synthesized low-frequency band. The original low-frequency-band signal and each synthesized low-frequency-band signal is used to excite a respective exciter, which can produce vibrations corresponding to the received signal. By placing the exciters in contact with or proximate to the body of a person, the person can experience the music, including not only the low-frequency components of the music but also, at least to some extent, the high-frequency components.

Recovery control for power converter

A device includes a first amplifier and a second amplifier. The first amplifier includes an inverting input configured to be coupled to a feedback node of an output of a power converter, a first non-inverting input configured to couple to a first voltage node, a second non-inverting input, and an output. The second amplifier includes an inverting input coupled to the output of the first amplifier, a non-inverting input coupled to a second voltage node, and an output. The device also includes a first transistor coupled to the output of the first amplifier and having a control terminal coupled to the output of the second amplifier, a capacitor coupled to a ground node and to the second non-inverting input of the first amplifier, and a current node coupled to the capacitor.

SIGNAL RECEIVER AND OPERATION METHOD THEREOF

A signal receiver includes a data sampler receiving a differential input signal having first and second input signals and determining bit values of the differential input signal based on first and second reference voltages, and a reference voltage generator performing a pre-tuning operation and a post-tuning operation to generate the reference voltages. The reference voltage generator performs the pre-tuning operation by generating first and second initial voltages and adjusting one of the initial voltages to generate third and fourth voltages. After the pre-tuning operation, the reference voltage generator performs the post-tuning operation by increasing or decreasing the third voltage to generate the first reference voltage and decreasing or increasing the fourth voltage to generate the second reference voltage based on a comparison result between the third voltage and the first input signal and a second comparison result between the fourth voltage and second input signal.

Class D amplifier circuit
11121690 · 2021-09-14 · ·

This application relates to Class D amplifier circuits. A modulator controls a Class D output stage based on a modulator input signal (Dm) to generate an output signal (Vout) which is representative of an input signal (Din). An error block, which may comprise an ADC, generates an error signal (ε) from the output signal and the input signal. In various embodiments the extent to which the error signal (ε) contributes to the modulator input signal (Dm) is variable based on an indication of the amplitude of the input signal (Din). The error signal may be received at a first input of a signal selector block. The input signal may be received at a second input of the signal selector block. The signal selector block may be operable in first and second modes of operation, wherein in the first mode the modulator input signal is based at least in part on the error signal; and in the second mode the modulator input signal is based on the digital input signal and is independent of the error signal. The error signal can be used to reduce distortion at high signal levels but is not used at low signal levels and so the noise floor at low signal levels does not depend on the component of the error block.

Class D amplifier circuit
11121690 · 2021-09-14 · ·

This application relates to Class D amplifier circuits. A modulator controls a Class D output stage based on a modulator input signal (Dm) to generate an output signal (Vout) which is representative of an input signal (Din). An error block, which may comprise an ADC, generates an error signal (ε) from the output signal and the input signal. In various embodiments the extent to which the error signal (ε) contributes to the modulator input signal (Dm) is variable based on an indication of the amplitude of the input signal (Din). The error signal may be received at a first input of a signal selector block. The input signal may be received at a second input of the signal selector block. The signal selector block may be operable in first and second modes of operation, wherein in the first mode the modulator input signal is based at least in part on the error signal; and in the second mode the modulator input signal is based on the digital input signal and is independent of the error signal. The error signal can be used to reduce distortion at high signal levels but is not used at low signal levels and so the noise floor at low signal levels does not depend on the component of the error block.

Butted Body Contact for SOI Transistor
20210305279 · 2021-09-30 ·

Systems, methods, and apparatus for an improved body tie construction are described. The improved body tie construction is configured to have a lower resistance body tie exists when the transistor is “off” (Vg approximately 0 volts). When the transistor is “on” (Vg>Vt), the resistance to the body tie is much higher, reducing the loss of performance associated with presence of body tie. Space efficient Body tie constructions adapted for cascode configurations are also described.