One example device for providing wireless power includes a power supply; a power amplifier coupled to the power supply, the power amplifier comprising a first switch and a second switch coupled to the power supply and to a common switch output, and a pulse-width modulator (PWM) coupled to the power amplifier, the PWM configured to substantially simultaneously toggle each of the first and second switches between open and closed states, and to maintain the first and second switches in opposite open and closed states; a controller coupled to the power supply and the PWM, the controller configured to: receive a sensor signal indicating an impedance of a load; determine a duty cycle of the PWM based on the sensor signal; and adjust an output voltage of the power supply based on the duty cycle of the PWM.

An integrated circuit includes a die that includes a circuit configured to generate a PWM signal in response to a first clock signal, and a first set of pads configured to provide amplified PWM signals to external filters. An amplifier stage is configured to provide the amplified PWM signals. The die includes two pads configured to be coupled to an external inductor, and a second set of pads configured to provide regulated voltages. An electronic converter circuit is configured to generate the regulated voltages to supply the amplifier stage. The electronic converter circuit includes a control circuit configured to drive electronic switches in response to a second clock signal to regulate the regulated voltages to a respective target value. The die includes a control block to synchronize the switching activity of the electronic switches with the switching activity of the amplifier stage.

An integrated circuit includes a die that includes a circuit configured to generate a PWM signal in response to a first clock signal, and a first set of pads configured to provide amplified PWM signals to external filters. An amplifier stage is configured to provide the amplified PWM signals. The die includes two pads configured to be coupled to an external inductor, and a second set of pads configured to provide regulated voltages. An electronic converter circuit is configured to generate the regulated voltages to supply the amplifier stage. The electronic converter circuit includes a control circuit configured to drive electronic switches in response to a second clock signal to regulate the regulated voltages to a respective target value. The die includes a control block to synchronize the switching activity of the electronic switches with the switching activity of the amplifier stage.

Described are concepts, systems, circuits and techniques directed toward methods and apparatus for generating one or more pulse width modulated (PWM) waveforms with the ability to dynamically control pulse width and phase with respect to a reference signal.

A class-D amplifying system includes: a first digital-to-analog converter (DAC), a class-D amplifier circuit and a second DAC. The first DAC generates an analog input signal according to a digital input signal. The class-D amplifier circuit generates an output signal according to the analog input signal in a pulse width modulation (PWM) manner. The second DAC generates a common mode (CM) adjustment current for adjusting a CM voltage of the analog input signal according to one or more of the following parameters: (1) the CM voltage of the analog input signal; and/or (2) a driving power. A power stage circuit of the class-D amplifier circuit is powered by the driving power. The second DAC determines which parameter the CM adjustment current is correlated to according to: (A) A level state of the output signal; and/or (B) A level state of a PWM signal of the class-D amplifier circuit.

A class-D amplifying system includes: a first digital-to-analog converter (DAC), a class-D amplifier circuit and a second DAC. The first DAC generates an analog input signal according to a digital input signal. The class-D amplifier circuit generates an output signal according to the analog input signal in a pulse width modulation (PWM) manner. The second DAC generates a common mode (CM) adjustment current for adjusting a CM voltage of the analog input signal according to one or more of the following parameters: (1) the CM voltage of the analog input signal; and/or (2) a driving power. A power stage circuit of the class-D amplifier circuit is powered by the driving power. The second DAC determines which parameter the CM adjustment current is correlated to according to: (A) A level state of the output signal; and/or (B) A level state of a PWM signal of the class-D amplifier circuit.

A hearable has an audio amplifier circuit coupled to a speaker as a load. The amplifier circuit has current source drive, which attenuates electromagnetically coupled noise of the speaker. In other instances, the amplifier circuit has a first amplifier mode and a second amplifier mode, wherein in the first amplifier mode the amplifier circuit becomes configured to drive the speaker as a voltage source, and in the second amplifier mode the amplifier circuit becomes configured to drive the speaker as a current source. Control logic varies the amplifier circuit between i) the first amplifier mode for larger amplitudes of the audio signal, and ii) the second amplifier mode for smaller amplitudes of the audio signal. Other aspects are also described and claimed.

A hearable has an audio amplifier circuit coupled to a speaker as a load. The amplifier circuit has current source drive, which attenuates electromagnetically coupled noise of the speaker. In other instances, the amplifier circuit has a first amplifier mode and a second amplifier mode, wherein in the first amplifier mode the amplifier circuit becomes configured to drive the speaker as a voltage source, and in the second amplifier mode the amplifier circuit becomes configured to drive the speaker as a current source. Control logic varies the amplifier circuit between i) the first amplifier mode for larger amplitudes of the audio signal, and ii) the second amplifier mode for smaller amplitudes of the audio signal. Other aspects are also described and claimed.

A circuit and computer implemented method tunes an RF switching power amplifier circuit for an antenna by receiving a measurement of reflected RF signal from the antenna, receiving a measurement of current provided to the circuit from a power source, receiving a measurement of RF power provided to the antenna, adjusting a tunable antenna circuit responsive to the measurement of reflected RF signal, and adjusting a first capacitor capacitance value and a second capacitor capacitance value of a waveform shaping circuit in response to the received measurement of current and RF power.

A bias circuit generates a bias current to an RF power amplifier used for transmitting RF signals, and the amount of the bias current supplied to the RF power amplifier can be configured in multiple modes through transistor switches that are controlled by mode control signals, so that the bias current supplied to the RF power amplifier can be adjusted according to the required power level of the transmitting RF signals. In addition, the bias current can be turned off by another transistor switch that is controlled by a power control signal for saving power while the RF power amplifier is not transmitting RF signals.