Patent classifications
H03F3/245
BIAS CIRCUIT AND AMPLIFIER
A bias circuit includes a mirror current source and a current-to-voltage converter. A first terminal of the mirror current source is connected to a supply voltage terminal, a second terminal of the mirror current source is connected to a reference voltage terminal, and a third terminal of the mirror current source is connected to the current-to-voltage converter. A mirror current source is configured to acquire a supply voltage transmitted at the supply voltage terminal through the first terminal, acquire a reference voltage transmitted at the reference voltage terminal through the second terminal, and regulate the supply voltage by using the reference voltage and a preset parameter to obtain a mirror current corresponding to the supply voltage. The preset parameter is parameter information of the mirror current source. The current-to-voltage converter is configured to convert the mirror current into a voltage to provide a bias voltage based on the voltage.
AMPLIFIER PEAK DETECTION
A peak detector for a power amplifier is provided that includes a threshold voltage detector configured to pulse a detection current in response to an amplified output signal from the amplifier exceeding a peak threshold. A plurality of such peak detectors may be integrated with a corresponding plurality of power amplifiers in a transmitter. Should any peak detector assert an alarm signal or more than a threshold number of alarm signals during a given period, a controller reduces a gain for the plurality of power amplifiers.
Method and system for multi-band digital pre-distortion using a canonical form with reduced dimension look-up table
A system and method for multi-band digital pre-distortion (DPD) for a non-linear system. The system includes a DPD circuitry configured to perform multi-band DPD on a multi-band input signal to compensate for a non-linearity of a non-linear system. The multi-band input signal includes input signals of multiple frequency bands and the DPD circuitry is configured to perform DPD on an input signal of each frequency band per frequency band. The DPD circuitry is configured to perform the DPD using a combination of a look-up table (LUT) that evaluates a non-linear function and computation of terms of a non-linear polynomial of one or more variables representing the input signals of multiple frequency bands. Both the non-linear function and the non-linear polynomial are in a reduced dimension lower than a dimension of the multi-band input signal.
Method and system for digital correction for a dynamically varying non-linear system
A system and method for digital correction for a dynamically varying non-linear system. The system includes a correction circuitry including at least one look-up table (LUT). The correction circuitry is configured to receive an input signal and modify the input signal to be processed by the non-linear system using at least one LUT to correct non-linearity incurred by the non-linear system. The at least one LUT is addressed by a magnitude or power of the input signal and a dynamically varying parameter associated with the input signal. The dynamically varying parameter may be one of average signal power of the input signal, a differential of the average power of the input signal, a directional beam index, or temperature.
ENVELOPE FOLLOWING BOOST CONVERTER
In some embodiments, a power supply system for a power amplifier can include a voltage converter implemented generate a first voltage at an output node, and an envelope following circuit implemented to generate and combine a second voltage with the first voltage to provide a combined output voltage for the power amplifier. The combined output voltage can have a waveform that follows one or more peaks of an envelope of a radio-frequency signal above the first voltage.
AMPLIFIER CIRCUIT WITH A CURRENT SOURCE
Amplifier circuits, radio communication circuits, radio communication devices, and methods provided in this disclosure. The amplifier circuit may include an amplifier configured to amplify an input signal to provide an output signal. The output signal of the amplifier may include a direct current (DC) signal. The amplifier circuit may further include a current source coupled to the amplifier. The current source may be configured to receive an electrical supply. The current source may further be configured to divide the direct current (DC) signal of the output signal based on the electrical supply.
AMPLIFIER CIRCUIT WITH AN ENVELOPE ENHANCEMENT
Amplifier circuits, radio communication circuits, radio communication devices, and methods provided in this disclosure provide an amplifier circuit. The amplifier circuit may include an amplifier configured to amplify an input signal to provide an output signal. The amplifier circuit may further include an amplifier stack including a first transistor coupled to the amplifier. The amplifier stack may be configured to receive the output signal to amplify the output signal. The amplifier stack may be configured to receive an input control signal to control the first transistor based on an envelope of the input signal.
METHODS AND DEVICES FOR INCREASED EFFICIENCY IN LINEAR POWER AMPLIFIER
A power amplifier circuit including a plurality of analog power amplifiers configured to generate a output power for an output signal; at least one processor configured to: select a highest output power signal; determine an input signal power of a modulated signal; determine an output signal power based on the input signal power; compare the output signal power and the highest output power; and disable a subset of the plurality of analog power amplifiers based on the comparison, wherein a remainder of the plurality of analog power amplifiers are configured to generate the output signal power.
MULTI-CORE DIGITAL POWER AMPLIFIER WITH UNBALANCED COMBINER
Various embodiments provide systems, devices, and methods for a multi-core digital power amplifier with an unbalanced power combiner. In one example, two or more cores are combined with a transformer section that has a first coupling coefficient and another two or more cores are combined with a second transformer section that has a second coupling coefficient that is different than the first coupling coefficient. The outputs of different cores may be cross-coupled with the primary inductors of the transformers. The digital power amplifier may provide an output power that is flat over a relatively wide operating range. Other embodiments may be described and claimed.
ADAPTIVE BIAS CIRCUITS AND METHODS FOR CMOS MILLIMETER-WAVE POWER AMPLIFIERS
Adaptive bias networks include small transistors connected to adjust gate bias voltage of one or more transistors of an amplifier or amplifier stage, or in a main or auxiliary path of a compound amplifier such as a Doherty amplifier. The small transistors are sized to avoid additional loading of the input. The adaptive bias circuits of preferred embodiments adjust the gate bias to produce a boost in gate bias voltage of an nFET transistor when the input power is in an upper portion of the amplifier or amplifier stage's input power range, thereby increasing the gain, and reduce gate bias voltage of a pFET transistor in the upper portion of the amplifier's input power range, thereby also increasing the gain. The adaptive bias networks can be implemented with varactors to vary DC voltage across the varactor to change its capacitance and compensate changing input capacitance of the amplifier input FET.