A conversion circuit for converting a current signal into a first output voltage signal, where the current signal flows through a sensing component, is provided. The conversion circuit includes: a first current eliminating circuit, configured to eliminate a first current in the current signal. The first current eliminating circuit includes: a current sample and hold circuit; and a current driving circuit, coupled between the sensing component and the current sample and hold circuit; a second current eliminating circuit, coupled to the sensing component and configured to eliminate a second current in the current signal; and an integrating circuit, coupled to the sensing component and configured to integrate a third current in the current signal, and output a first input voltage signal between a first integration output terminal and a second integration output terminal.

A driver circuit including a first op-amp, a second op-amp, and a power switching circuit is provided. The first op-amp includes a first input stage circuit for generating a first amplified signal and a first output stage circuit. The second op-amp includes a second input stage circuit for generating a second amplified signal and a second output stage circuit. The power switching circuit includes a first output terminal for outputting one of the first amplified signal and the second amplified signal and a second output terminal for outputting the other of the first amplified signal and the second amplified signal. The power switching circuit is configured to switch a first power supply for both the first input stage circuit and the second input stage circuit between a first supply voltage and a second supply voltage in response to the control signal.

The present invention provides an amplifier circuit, wherein the amplifier circuit includes a DAC, an output stage and a detector. In the operations of the amplifier circuit, the DAC is arranged for performing a digital-to-analog converting operation upon a digital input signal to generate an analog signal, the output stage is arranged for receiving the analog signal to generate an output signal, and the detector is arranged for detecting a characteristic of the input signal, and referring to the characteristic of the input signal to generate at least one control signal to adjust the output stage at a zero-crossing point of the output signal.

An amplifying circuit includes a first reconfigurable amplifier configured to selectively operate in a cascode mode or a non-cascode mode, wherein an input of the first reconfigurable amplifier is coupled to a first input of the amplifying circuit, and an output of the first reconfigurable amplifier is coupled to an output of the amplifying circuit. The amplifying circuit also includes a second reconfigurable amplifier configured to selectively operate in the cascode mode or the non-cascode mode, wherein an input of the second reconfigurable amplifier is coupled to a second input of the amplifying circuit, and an output of the second reconfigurable amplifier is coupled to the output of the amplifying circuit.

Use of a closed loop APC may involve a problem of cost and power consumption due to increased circuit scale. The semiconductor device includes a power amplifier that amplifies an output from a transmission circuit and a regulator that supplies power to the power amplifier. The regulator includes an operational amplifier comprising a loop gain control circuit and a loop gain control voltage generation circuit that supplies control voltage to the loop gain control circuit. The loop gain control voltage generation circuit minimizes a loop gain of the operational amplifier when starting up the regulator.

A linear amplifier of an envelope tracking supply modulator includes a pre-driver stage circuit and an output stage circuit. The pre-driver stage circuit receives an envelope input, and generates a pre-driver output according to the envelope input. The output stage circuit receives the pre-driver output, and generates an amplifier output according to the pre-driver output. The amplifier output is involved in setting a modulated supply voltage of a power amplifier. The output stage circuit has a plurality of amplifiers, including a first amplifier and a second amplifier. When the power amplifier has a first output power level, the first amplifier is involved in setting the amplifier output, and the second amplifier is not involved in setting the amplifier output. When the power amplifier has a second output power level different from the first output power level, the first amplifier and the second amplifier are involved in setting the amplifier output.

A power amplifier cell is disclosed having a first transistor with a first terminal coupled to ground, a second terminal, and a first control terminal. A second transistor has a third terminal coupled to the second terminal, a fourth terminal, and a second control terminal. Further included is a capacitor having a first plate coupled directly to the second control terminal and a second plate coupled to the ground. As such, there is no intervening inductor component coupled between the first plate and the second control terminal, leaving only parasitic inductance between the first plate and the second control terminal. The capacitor has a capacitance sized to resonate with the parasitic inductance at a resonant frequency substantially higher than a desired frequency of operation of the power amplifier cell.

The transmission delay time of a receiver for receiving a differential signal is reduced. A first amplifier circuit is provided in an input stage of the receiver, and a second amplifier circuit is provided in an output stage of the receiver. The first amplifier circuit is a differential input, differential output amplifier circuit. The second amplifier circuit is a differential input, single-ended output amplifier circuit. A first power supply voltage and a second power supply voltage are input as a high-level power supply voltage and a low-level power supply voltage to the first amplifier circuit and the second amplifier circuit, respectively. The withstand voltage of transistors of a differential pair of the first amplifier circuit is higher than the withstand voltage of another transistor included in the first amplifier circuit and a transistor included in the second amplifier circuit.

A system includes a class D amplifier and a current steering digital-to-analog converter (DAC) directly connected to the class D amplifier. The system also includes a common mode servo circuit coupled to a node interconnecting the current steering DAC to the class D amplifier. The common servo circuit amplifies a difference between a common mode signal determined from the node and a reference voltage and generates a feedback current to the node based on the amplified difference. A feed-forward common-mode compensation circuit is included to reduce an alternating current (AC) ripple from the class D amplifier. The feed-forward common-mode compensation circuit includes first and second resistors coupled to respective outputs of the class D amplifier. A current mirror is coupled to the first and second resistors and is configured to sink a current from the node to ground that approximates a common mode feedback current of the class D amplifier.

A rail-to-rail sense amplifier includes a PMOS differential pair and an NMOS differential pair that are arranged in parallel with regard to a biasing network for driving a class AB output stage. The sense amplifier includes a first current differential amplifier and a second current differential amplifier for increasing the output swing while reducing power consumption.