H03F3/3022

Amplifier, circuit for trimming a bias voltage, method for amplifying an input signal and method for trimming a bias voltage
11190137 · 2021-11-30 · ·

An amplifier includes an amplifying device and a bias circuit for providing a bias voltage for the amplifying device. The bias circuit is configured to provide the bias voltage in dependence of an output signal of an optical coupling arrangement which provides for electrical isolation.

ENVELOPE TRACKING SUPPLY MODULATOR USING LINEAR AMPLIFIER WITH SEGMENTED OUTPUT STAGE AND ASSOCIATED WIRELESS COMMUNICATION SYSTEM
20220021342 · 2022-01-20 · ·

A linear amplifier of an envelope tracking supply modulator includes a pre-driver stage circuit and an output stage circuit. The pre-driver stage circuit receives an envelope input, and generates a pre-driver output according to the envelope input. The output stage circuit receives the pre-driver output, and generates an amplifier output according to the pre-driver output. The amplifier output is involved in setting a modulated supply voltage of a power amplifier. The output stage circuit has a plurality of amplifiers, including a first amplifier and a second amplifier. When the power amplifier has a first output power level, the first amplifier is involved in setting the amplifier output, and the second amplifier is not involved in setting the amplifier output. When the power amplifier has a second output power level different from the first output power level, the first amplifier and the second amplifier are involved in setting the amplifier output.

High voltage output stage

An amplifier circuit includes a high-voltage output stage. The high-voltage output stage includes an output terminal, a high-side output circuit, a low-side output circuit, and a feedback circuit. The high-side output circuit sources current to the output terminal, and includes a high-side input transistor, a first high-side cascode transistor coupled to the high-side input transistor, and a second high-side cascode transistor coupled to the first high-side cascode transistor and the output terminal. The low-side output circuit sinks current from the output terminal, and includes a low-side input transistor, a first low-side cascode transistor coupled to the low-side input transistor, and a second low-side cascode transistor coupled to the first low-side cascode transistor and the output terminal. The feedback circuit is configured to bias the second high-side cascode transistor and the second low-side cascode transistor based on a sense voltage generated by the high-side output circuit or the low-side output circuit.

Auto-zero applied buffer for display circuitry

A system includes a pixel that emits light based on a signal provided to the pixel. The system may also include a buffer circuit having a differential pair stage, a cascade stage, and an output stage. The differential pair stage may receive a common mode voltage signal via a first switch in response to the first switch receiving a first signal that causes the first switch to close. The differential pair stage may couple a capacitor to the output stage via a second switch that operate based on a second signal, such that the capacitor reduces an offset provided by one or more circuit components in the differential pair stage, the cascade stage, the output stage, or any combination thereof. The differential pair stage may output the common mode voltage to the pixel via the output stage in response to the first signal being present.

Circuit for increasing output direct-current level of transimpedance amplification stage in TIA

A circuit for increasing an output direct-current level of a transimpedance amplification stage in a TIA (Trans-Impedance Amplifier) includes a transimpedance amplification stage, a differential amplification stage, a level boosting unit, and a DC-restore loop. An input terminal of the transimpedance amplification stage is used for inputting a photocurrent signal. An output terminal of the transimpedance amplification stage is directly connected to an input terminal of the differential amplification stage.

RECONFIGURABLE AMPLIFIER

An amplifying circuit includes a first reconfigurable amplifier configured to selectively operate in a cascode mode or a non-cascode mode, wherein an input of the first reconfigurable amplifier is coupled to a first input of the amplifying circuit, and an output of the first reconfigurable amplifier is coupled to an output of the amplifying circuit. The amplifying circuit also includes a second reconfigurable amplifier configured to selectively operate in the cascode mode or the non-cascode mode, wherein an input of the second reconfigurable amplifier is coupled to a second input of the amplifying circuit, and an output of the second reconfigurable amplifier is coupled to the output of the amplifying circuit.

Local oscillator buffer
11658611 · 2023-05-23 · ·

A local oscillator buffer circuit comprises a complementary common-source stage comprising a first p-channel transistor (MCSP) and a first n-channel transistor (MCSN), arranged such that their respective gate terminals are connected together at a first input node, and their respective drain terminals of each of is connected together at a buffer output node. A complementary source-follower stage comprises a second p-channel transistor (MSFP) and a second n-channel transistor (MSFN), arranged such that their respective gate terminals are connected together at a second input node, and their respective source terminals are connected together at the buffer output node.

HIGH-SPEED BUFFER AMPLIFIER
20230237973 · 2023-07-27 ·

A high-speed buffer amplifier includes an input stage including a first channel coupled to receive differential inputs and a second channel coupled to receive the differential inputs; a middle stage including a first current source coupled to receive outputs of the second channel and electrically connected to power, a second current source coupled to receive outputs of the first channel and electrically connected to ground, and a floating current source electrically connected between the first current source and the second current source; and an output stage coupled to the middle stage to generate an output voltage. A shunt circuit is electrically connected between the first current source and the second current source, and configured to bypass the floating current source.

Current sensing
11815534 · 2023-11-14 · ·

This invention relates to current sensing, in particular for a signal processing circuit (500) for outputting an output signal (Sout) based on an input signal (Sin). An output stage (101) includes an output transistor (102) driven, in use, by a drive signal. A current monitor (501) is configured to monitor, in use, a first current through the output transistor, wherein the current monitor comprises a current sensor (105) having a sense transistor (106) configured to be driven based on the drive signal so as to generate a sense current related to the first current. A compensation controller (301) receives an indication of signal level of the input signal and controllably varies operation of the current monitor (501) so as to at least partially compensate for signal-dependent variation in a relationship between the first current and the first sense current.

Selectively switchable wideband RF summer

A radio frequency (RF) summer circuit having a characteristic impedance Z.sub.0 comprises first and second ports coupled by first and second resistances, respectively, to a junction. The circuit further comprises a series combination of a third resistance and a switch movable between open and closed positions and an amplifier having input and output terminals and operable in an off state and an on state wherein the series combination is coupled across the input and output terminals of the amplifier between the junction and a third port. The first resistance, second resistance, and the third resistance are all substantially equal to Z.sub.0/3. Further, when the switch is moved to the closed position and the amplifier is switched to the off state a passive mode of operation is implemented and when the switch is moved to the open position and the amplifier is switched to the on state an active mode of operation is implemented. The RF summer circuit develops a summed signal at the third port equal to a sum of signals at the first and second ports modified by one of first and second gain values.