A source follower includes a first transistor, a first output module, a second transistor, a second output module and a feedback module. The first terminal and the control terminal of the first transistor are configured to respectively receive a first base voltage and a first control voltage. The second terminal of the first transistor and the first output module are electrically connected to a first output terminal. The first terminal and the control terminal of the second transistor are configured to respectively receive a first base voltage and a second control voltage. The second terminal of the second transistor and the second output module are electrically connected to a second output terminal. The feedback module is electrically connected to the control terminal of the first transistor, the control terminal of the second transistor and a reference node of the second output module.

A power supply includes a voltage regulator, a transistor, a current-to-voltage transform circuit, and a comparator. The voltage regulator receives a control signal, a source voltage, and a control voltage, and outputs a supply voltage according to the control voltage and the control signal. The transistor has a first terminal receiving the source voltage, and a control terminal coupled to the voltage regulator. The current-to-voltage transform circuit has a first terminal coupled to a second terminal of the transistor, a second terminal for receiving a reference voltage. The comparator has a first input terminal for receiving a comparison signal, a second input terminal coupled to the first terminal of the current-to-voltage transform circuit, and an output terminal for outputting the control voltage.

A power supply includes a voltage regulator, a transistor, a current-to-voltage transform circuit, and a comparator. The voltage regulator receives a control signal, a source voltage, and a control voltage, and outputs a supply voltage according to the control voltage and the control signal. The transistor has a first terminal receiving the source voltage, and a control terminal coupled to the voltage regulator. The current-to-voltage transform circuit has a first terminal coupled to a second terminal of the transistor, a second terminal for receiving a reference voltage. The comparator has a first input terminal for receiving a comparison signal, a second input terminal coupled to the first terminal of the current-to-voltage transform circuit, and an output terminal for outputting the control voltage.

A differential current conveyor circuit includes two or more single-ended current conveyor stages and a common bias stage. First and second switches are set between the control terminals of the transistors in the common bias stage and a respective one of a first and a second coupling line of the single ended stages can be switched between the following: a reset state of the circuit with the transistors in the common bias stage coupled to the first and second coupling lines with the single-ended stages set to a bias condition; and a sensing state of the circuit with the transistors in the common bias stage decoupled from the first and second coupling lines, with the single-ended stages in a high impedance state with the control terminals of the input transistors of the single ended stages capacitively coupled to the input terminal.

A differential current conveyor circuit includes two or more single-ended current conveyor stages and a common bias stage. First and second switches are set between the control terminals of the transistors in the common bias stage and a respective one of a first and a second coupling line of the single ended stages can be switched between the following: a reset state of the circuit with the transistors in the common bias stage coupled to the first and second coupling lines with the single-ended stages set to a bias condition; and a sensing state of the circuit with the transistors in the common bias stage decoupled from the first and second coupling lines, with the single-ended stages in a high impedance state with the control terminals of the input transistors of the single ended stages capacitively coupled to the input terminal.

An amplifier of an embodiment includes: a plurality of input transistors of a plurality of differential pairs; a plurality of first resistance circuits mutually connecting respective sources of the input transistors corresponding to the differential pairs and mutually connecting the respective sources and reference potential points; a plurality of second resistance circuits being connected between the respective sources of the plurality of input transistors and the reference potential points, respectively; and a control circuit configured to generate a control signal controlling whether or not to electrically connect the plurality of first resistance circuits and the plurality of second resistance circuits to the respective sources of the input transistors.

An amplifier of an embodiment includes: a plurality of input transistors of a plurality of differential pairs; a plurality of first resistance circuits mutually connecting respective sources of the input transistors corresponding to the differential pairs and mutually connecting the respective sources and reference potential points; a plurality of second resistance circuits being connected between the respective sources of the plurality of input transistors and the reference potential points, respectively; and a control circuit configured to generate a control signal controlling whether or not to electrically connect the plurality of first resistance circuits and the plurality of second resistance circuits to the respective sources of the input transistors.

An amplifier of an embodiment includes: a plurality of input transistors of a plurality of differential pairs; a plurality of first resistance circuits mutually connecting respective sources of the input transistors corresponding to the differential pairs and mutually connecting the respective sources and reference potential points; a plurality of second resistance circuits being connected between the respective sources of the plurality of input transistors and the reference potential points, respectively; and a control circuit configured to generate a control signal controlling whether or not to electrically connect the plurality of first resistance circuits and the plurality of second resistance circuits to the respective sources of the input transistors.

An amplifier of an embodiment includes: a plurality of input transistors of a plurality of differential pairs; a plurality of first resistance circuits mutually connecting respective sources of the input transistors corresponding to the differential pairs and mutually connecting the respective sources and reference potential points; a plurality of second resistance circuits being connected between the respective sources of the plurality of input transistors and the reference potential points, respectively; and a control circuit configured to generate a control signal controlling whether or not to electrically connect the plurality of first resistance circuits and the plurality of second resistance circuits to the respective sources of the input transistors.

A signal amplifying system having an oscillator and an amplifying circuit. The oscillator has a first resistor with a first resistance R1 and a first capacitor with a first capacitance C1, and generates an oscillating signal having a frequency f which equals to k1/(R1*C1), k1 is a first proportional parameter. The amplifying circuit has an input terminal to receive an input signal and amplifies the input signal under the control of the oscillating signal. The amplifying circuit has a second resistor with a second resistance R2 and a second capacitor with a second capacitance C2. The amplifying circuit has a 3 dB bandwidth W.sub.3 dB which equals to k2/(R2*C2), k2 is a second proportional parameter. In this signal amplifying system, the product of the first resistance R1 and the first capacitance C1 is proportional to the product of the second resistance R2 and the second capacitance C2.