The present disclosure provides an amplifier circuit that includes one or more amplifier stages, each of the one or more amplifier stages including a complementary transistor configuration. The complementary transistor configuration includes an NMOS transistor and a PMOS transistor. The NMOS transistor is electrically coupled in parallel to the PMOS transistor. The amplifier circuit further includes an output amplifier stage electrically coupled to an output of the one or more amplifier stages, the output amplifier stage including a non-complementary transistor configuration including one or more NMOS transistors or PMOS transistors.

The present disclosure provides an amplifier circuit that includes one or more amplifier stages, each of the one or more amplifier stages including a complementary transistor configuration. The complementary transistor configuration includes an NMOS transistor and a PMOS transistor. The NMOS transistor is electrically coupled in parallel to the PMOS transistor. The amplifier circuit further includes an output amplifier stage electrically coupled to an output of the one or more amplifier stages, the output amplifier stage including a non-complementary transistor configuration including one or more NMOS transistors or PMOS transistors.

A common gate amplifier circuit configured to provide decreased voltage transients in the input voltage due to reverse gain. A second FET transistor is connected in series with a first FET of the common gate amplifier to function as an additional capacitive voltage divider between the amplifier output and the amplifier input without influencing the input or output currents. The first FET transistor, coupled to the amplifier input, may be a low voltage FET and smaller than the second FET transistor, which is coupled to the amplifier output. Both FET transistors are preferably enhancement mode GaN FET transistors and may be integrated into a single semiconductor chip with a single internal bias voltage divider.

A power supply circuitry includes a first transistor, a feedback circuit, a first differential amplifier circuit, a second differential amplifier circuit, and a first control circuit. The first transistor outputs a power supply voltage based on a drive signal. The feedback circuit generates a feedback voltage of the power supply voltage. The first differential amplifier circuit amplifies a difference between the feedback voltage and a reference voltage, and outputs the drive signal. The second differential amplifier circuit amplifies a difference between the reference voltage and the feedback voltage. The first control circuit detects a change in the power supply voltage by using a differentiation circuit and controls the power supply voltage based on an output of the second differential amplifier circuit.

In one embodiment, stable and controlled circuit element biasing is provided in a circuit comprising a voltage source operable to output a first voltage, a reference voltage source operable to output a reference voltage, a circuit element biased, during operation, by the first voltage at a first end and by a second voltage at a second end, a voltage controller coupled to the second end of the circuit element, wherein the voltage controller is operable to adjust the second voltage based on a gain output, a gain controller operable to receive the reference voltage as a first input and the second voltage as a second input, wherein the gain controller is operable to generate, at an output of the gain controller, the gain output based on the second voltage and the reference voltage, and a feedback loop that extends from the output of the gain controller, through the voltage controller, and to the second input.

Voltage-to-current converters that include two current mirrors are disclosed. In an example voltage-to-current converter each current mirror is a complementary current mirror in that one of its input and output transistors is a P-type transistor and the other one is an N-type transistor. Such voltage-to-current converters may be implemented using bipolar technology, CMOS technology, or a combination of bipolar and CMOS technologies, and may be made sufficiently compact and accurate while operating at sufficiently low voltages and consuming limited power.

A semiconductor device includes: a first buffer at which a predetermined signal is input and that outputs a first output signal; a second buffer at which an inverted signal of the predetermined signal is input and that outputs a second output signal; and a short circuit detection circuit that, in accordance with a potential difference between the first output signal and the second output signal, outputs a short circuit evaluation signal evaluating whether or not there is a ground fault in at least one of a first terminal at an output side of the first buffer or a second terminal at an output side of the second buffer or evaluating whether or not there is a short circuit between the first terminal and the second terminal.

An amplification apparatus includes a bias circuit for supplying a bias voltage, and an amplification circuit to which the bias voltage is supplied from the bias circuit. The bias circuit includes a first current source for increasing/decreasing a first current depending on the bias voltage, and a first MOSFET with first polarity through which the first current flows, to output a first voltage from a connection between the first current source and the first MOSFET; a second current source for outputting a constant current as a second current, and a second MOSFET with second polarity through which the second current flows, to output a second voltage from a connection between the second current source and the second MOSFET; and a voltage comparator for increasing/decreasing the bias voltage such that the first and second voltages become equal, based on a difference between the first and second voltages.

An ultrasound circuit comprising a single-ended trans-impedance amplifier (TIA) is described. The TIA is coupled to an ultrasonic transducer to amplify an electrical signal generated by the ultrasonic transducer in response to receiving an ultrasound signal. The TIA is followed by further processing circuitry configured to filter, amplify, and digitize the signal produced by the TIA.

An ultrasound circuit comprising a single-ended trans-impedance amplifier (TIA) is described. The TIA is coupled to an ultrasonic transducer to amplify an electrical signal generated by the ultrasonic transducer in response to receiving an ultrasound signal. The TIA is followed by further processing circuitry configured to filter, amplify, and digitize the signal produced by the TIA.