In an example, an electrical circuit device for amplifying a physiological signal includes a modulation unit configured to receive an input signal, to modulate the input signal to produce a modulated signal. The device also includes an amplification and transconductance unit configured to amplify an amplitude of the modulated signal and increase a transconductance of the modulated signal to produce a transconductance enhanced modulated and amplified signal, where the amplification and transconductance unit comprises at least a first complementary pair of transistors and a second complementary pair of transistors configured to receive the modulated signal and to amplify and increase the transconductance of the modulated signal. The device also includes a demodulation unit configured to receive the transconductance enhanced modulated and amplified signal and to demodulate the signal.

A capacitive gain amplifier circuit includes two sets of Miller capacitors and two output stage differential amplifier circuits. A first set of Miller capacitors is used to compensate the first output stage differential amplifier circuit during a first phase that resets the first output stage differential amplifier circuit. The second set of Miller capacitors is used to compensate the first output stage differential amplifier circuit during a second phase that chops a signal being amplified. The second set of Miller capacitors is swapped from one polarity to an opposite polarity of the first output stage differential amplifier circuit during successive second phases. The second output stage differential amplifier circuit includes a set of inputs selectively coupled with the inputs of the first output stage differential amplifier circuit and a set of outputs selectively coupled with the outputs of the first output stage differential amplifier circuit during the second phase.

A capacitive gain amplifier circuit includes two sets of Miller capacitors and two output stage differential amplifier circuits. A first set of Miller capacitors is used to compensate the first output stage differential amplifier circuit during a first phase that resets the first output stage differential amplifier circuit. The second set of Miller capacitors is used to compensate the first output stage differential amplifier circuit during a second phase that chops a signal being amplified. The second set of Miller capacitors is swapped from one polarity to an opposite polarity of the first output stage differential amplifier circuit during successive second phases. The second output stage differential amplifier circuit includes a set of inputs selectively coupled with the inputs of the first output stage differential amplifier circuit and a set of outputs selectively coupled with the outputs of the first output stage differential amplifier circuit during the second phase.

A capacitive gain amplifier circuit amplifies an input signal by a pair of differential amplifier circuits couples in series. The first differential amplifier circuit is reset during an autozero phase while disconnected from the second differential amplifier circuit, and the first and second differential amplifier circuits are connected together in series during a chop phase. A set of feedback capacitors is selectively switched in between respective outputs of the second differential amplifier circuit and respective inputs of the first differential amplifier circuit during the chop phase.

A capacitive gain amplifier circuit amplifies an input signal by a pair of differential amplifier circuits couples in series. The first differential amplifier circuit is reset during an autozero phase while disconnected from the second differential amplifier circuit, and the first and second differential amplifier circuits are connected together in series during a chop phase. A set of feedback capacitors is selectively switched in between respective outputs of the second differential amplifier circuit and respective inputs of the first differential amplifier circuit during the chop phase.

Aspects of the disclosure provide an amplifier system and a method for dynamically cancelling an offset voltage. The amplifier system includes a chopper amplifier system that includes a differential amplifier with an offset calibration circuit. The chopper amplifier system is configured to generate an output signal including voltage variations indicating an offset voltage of the differential amplifier. The amplifier system also includes a feedback circuit configured to determine a polarity of the offset voltage of the differential amplifier based on the output signal, and to transmit a control signal to the offset calibration circuit to reduce the offset voltage of the differential amplifier.

Aspects of the disclosure provide an amplifier system and a method for dynamically cancelling an offset voltage. The amplifier system includes a chopper amplifier system that includes a differential amplifier with an offset calibration circuit. The chopper amplifier system is configured to generate an output signal including voltage variations indicating an offset voltage of the differential amplifier. The amplifier system also includes a feedback circuit configured to determine a polarity of the offset voltage of the differential amplifier based on the output signal, and to transmit a control signal to the offset calibration circuit to reduce the offset voltage of the differential amplifier.

A main amplifier generates an output signal S.sub.OUT according to a difference between first and second voltages VP and VN. A first gm amplifier is arranged as a differential input stage. A second, fully differential, gm amplifier amplifies a voltage difference between its non-inverting and inverting input terminals, and outputs a differential current signal I.sub.3N/I.sub.3P via its inverting and non-inverting output terminals. An integrator integrates a differential input current I.sub.4P/I.sub.4N input via its non-inverting and inverting input terminals, and samples and holds the signal every predetermined period, to generate a differential voltage signal. A first selector is arranged as an upstream stage of the second gm amplifier, and outputs the differential input signal without change or otherwise after swapping. A second selector is arranged as a downstream stage of the second gm amplifier, and outputs the signal I.sub.3N/I.sub.3P output from the second gm amplifier without change or otherwise after swapping.

A main amplifier generates an output signal S.sub.OUT according to a difference between first and second voltages VP and VN. A first gm amplifier is arranged as a differential input stage. A second, fully differential, gm amplifier amplifies a voltage difference between its non-inverting and inverting input terminals, and outputs a differential current signal I.sub.3N/I.sub.3P via its inverting and non-inverting output terminals. An integrator integrates a differential input current I.sub.4P/I.sub.4N input via its non-inverting and inverting input terminals, and samples and holds the signal every predetermined period, to generate a differential voltage signal. A first selector is arranged as an upstream stage of the second gm amplifier, and outputs the differential input signal without change or otherwise after swapping. A second selector is arranged as a downstream stage of the second gm amplifier, and outputs the signal I.sub.3N/I.sub.3P output from the second gm amplifier without change or otherwise after swapping.

A voltage-current converter includes a first input stage and a second input stage with a first transistor and a second transistor driven by the first input stage and by the second input stage, respectively. First and second current generators are coupled to current lines of the first transistor and of the second transistor. At least one resistor couples the current lines of the first transistor and of the second transistor, where the ends of the aforesaid resistor are coupled to feedback terminals of the input stages so that an input voltage applied between voltage input terminals of the input stages is converted into a current on respective current output terminals of the converter. The converter includes switching circuits for coupling the first and second current generators alternately to the current line of the first transistor and to the current line of the second transistor.