A thermally-isolated-metal-oxide-semiconducting (TMOS) sensor has inputs coupled to first and second nodes to receive first and second bias currents, and an output coupled to a third node. A tail has a first conduction terminal coupled to the third node and a second conduction terminal coupled to a reference voltage. A control circuit applies a control signal to a control terminal of the tail transistor based upon voltages at the first and second nodes so that a common mode voltage at the first and second nodes is equal to a reference common mode voltage. A differential current integrator has a first input terminal coupled to the second node and a second input terminal coupled to the first node, and provides an output voltage indicative of an integral of a difference between a first output current at the first input terminal and a second output current at the second input terminal.

A system is disclosed which allows for canceling high frequency rail to rail common mode swing at pulse-width modulation (PWM) frequency for a Class-D, H and G audio amplifier or a Linear Resonance Actuator (LRA) driver. This allows wide bandwidth current sensing without the need of external components, or large on-chip resistor-capacitor (RC) networks, facilitating integration of the sense resistor. In addition, the sense amplifier DC input common mode and audio band common mode swing is reduced, allowing a sense resistor high frequency common mode swing of a least twice the MOSFET gate break down voltages.

A chopper amplifier and method of operation are described. The chopper amplifier comprises a first chopper arranged to modulate an input signal using a first chopper signal having a chopper frequency. An amplification stage has an input arranged to receive the chopped signal and an output, and supplies an amplified signal at the output. An output chopper is arranged to integrate the amplified signal using a second chopper signal having the chopper frequency to generate an amplified output signal. The amplification stage is further configured to filter the chopped signal to attenuate signal components having frequencies lower than the chopper frequency.

A chopper amplifier and method of operation are described. The chopper amplifier comprises a first chopper arranged to modulate an input signal using a first chopper signal having a chopper frequency. An amplification stage has an input arranged to receive the chopped signal and an output, and supplies an amplified signal at the output. An output chopper is arranged to integrate the amplified signal using a second chopper signal having the chopper frequency to generate an amplified output signal. The amplification stage is further configured to filter the chopped signal to attenuate signal components having frequencies lower than the chopper frequency.

An active electrode has an electrode for sensing an electric potential and generating an input signal, and a shield placed near the electrode but being electric insulated from the electrode. An integrated amplifier (10) has an input connected to the at least one electrode for receiving the input signal, and providing a buffered path outputting a buffered output signal. The shield being connected to the output of the integrated amplifier to actively drive the electrical potential of the shield, thereby providing an active shielding of the electrode. The buffered path includes a first mixer (11) in front of the integrated amplifier for frequency shifting the input signal from a basic frequency range to a higher frequency range, and a second mixer (12) on the output of the integrated amplifier for frequency shifting the amplified signal from the higher frequency range back to the basic frequency range. The active electrode may be used for recording EEG signals.

An active electrode has an electrode for sensing an electric potential and generating an input signal, and a shield placed near the electrode but being electric insulated from the electrode. An integrated amplifier (10) has an input connected to the at least one electrode for receiving the input signal, and providing a buffered path outputting a buffered output signal. The shield being connected to the output of the integrated amplifier to actively drive the electrical potential of the shield, thereby providing an active shielding of the electrode. The buffered path includes a first mixer (11) in front of the integrated amplifier for frequency shifting the input signal from a basic frequency range to a higher frequency range, and a second mixer (12) on the output of the integrated amplifier for frequency shifting the amplified signal from the higher frequency range back to the basic frequency range. The active electrode may be used for recording EEG signals.

Apparatus and methods for reducing input bias current of electronic circuits are provided herein. In certain implementations, an electronic circuit includes a first input terminal, a second input terminal, an input circuit, and a plurality of input switches including at least a first input switch and a second input switch. The first input switch is electrically connected between the first input terminal and a first input of the input circuit, the second input switch is electrically connected between the second input terminal and a second input of the input circuit, and the first and second input switches can be opened and closed using a clock signal. The electronic circuit further includes a charge compensation circuit for compensating for charge injection through the first and second input switches during transitions of the clock signal.

A semiconductor device includes a magnetic switch provided on a semiconductor substrate. The magnetic switch includes: a Hall element, first and second power supply terminals; a current source driving the Hall element; a switch circuit switching a differential output voltage supplied from two electrodes of the Hall element to a first or second state based on a control signal supplied from a control terminal; an amplifier amplifying a signal from the switch circuit; a reference voltage circuit generating a reference voltage based on a reference common mode voltage and a control signal; a comparator receiving an output signal of the amplifier and the reference voltage; and a latch circuit latching an output voltage of the comparator. The reference voltage of the reference voltage circuit is controlled by switching from a reference value to a voltage with a high or low adjustment value according to the output voltage of the comparator.

A method for use in an analog circuit having a plurality of differential pairs of elements, wherein for each pair of the plurality of differential pairs of elements, the elements of the pair are designed to match but may have mismatch that induces error. The method includes, for each pair of at least two pairs of the plurality of differential pairs of elements: spectrally separating the mismatch-induced error of the pair from mismatch-induced error of a remainder of the plurality of differential pairs of elements, monitoring, by an analog-to-digital converter (ADC), an output of the analog circuit, and analyzing the monitored output to measure the mismatch-induced error of the pair.

A method for matching a pair of composite circuit elements (CEs) included in a circuit includes fabricating N CEs (e.g., resistors, transistors, current sources, capacitors) designed to match and switches configurable, according to M different combinations, to connect N/2 of the N CEs to form a first composite CE and to connect a remaining N/2 of the N CEs to form a second composite CE. Sequentially in time, for each combination of the M combinations, the switches are configured to form the first and second composite CEs according to the combination and a characteristic of the circuit is measured that includes the formed first and second composite CEs. The characteristic indicates how well the formed composite CEs match. A final combination of the M combinations is chosen whose measured characteristic indicates a best match and the final combination is used to configure the switches to form the composite CEs.