Patent classifications
H03F3/45076
DIFFERENTIAL AMPLIFIER
A differential amplifier includes a pre-driver stage, an input balun, a matching network, a differential transistor pair, a bias network and an output balun. An output terminal of the pre-driver stage is connected to an input terminal of the input balun. An output terminal of the input balun is connected to the matching network. An output terminal of the matching network is connected to an input terminal of the differential transistor pair and to the bias network. An output terminal of the differential transistor pair is connected to the output balun. A single-turn laminated transformer is used as the input balun of the present invention, and the output balun is of a structure having an inner full frame and an outer half frame, thereby making the differential amplifier have small occupation area, low loss, high operating frequency and high power amplification efficiency.
Cancel voltage offset of operational amplifier
A system according to examples of the present disclosure includes a battery charger electrically coupled to a battery and a battery charging circuit. The battery charging circuit includes an operational amplifier having a negative input to receive a pre-bias voltage, a positive input, an output, and a voltage offset. The battery charging circuit also includes a charge controller having an analog-to-digital converter to receive a voltage output from the output of the operational amplifier and a voltage supply to supply a voltage input into the positive input of the operation amplifier to cancel the voltage offset of the operational amplifier. In the example, the voltage output of the charge controller is a function of the voltage input of the charge controller.
Low power buffer with dynamic gain control
The present disclosure provides a detailed description of techniques for implementing a low power buffer with dynamic gain control. More specifically, some embodiments of the present disclosure are directed to a buffer having a gain boost configuration and a current shunt circuit to control the gain of a respective gain boosting transistor of the gain boost configuration. The current shunt circuit and resulting gain are dynamically controlled by a gain control signal such that the buffer gain can be adjusted to within an acceptable range of the target gain for the current operating and device mismatch conditions. In one or more embodiments, the gain boost configuration with dynamic gain control can be deployed in a full differential implementation. Both analog and digital dynamic calibration and control techniques can be used to provide the gain control signals to multiple current shunt circuits and multiple buffers.
AMPLIFIER AND SEMICONDUCTOR APPARATUS USING THE SAME
An amplifier may include a differential pair circuit configured to generate an output signal according to a first input signal and a second input signal, a plurality of current sinks coupled between a ground terminal and the differential pair circuit, and a feedback circuit configured to sense a level of the output signal and generate a feedback signal. At least one of the plurality of current sinks is controlled according to the feedback signal.
SUMMATION FOR MULTI-CHANNEL PHOTOMULTIPLIER ARRAY SIGNALS
A summation circuit (1) for summing one or more signals received from a photomultiplier array is proposed. The summation circuit comprises one or more readout circuits (5) coupleable to one or more photodiodes of the photomultiplier array (2), respectively, and a channel summing module (50), coupled at one or more outputs of the one or more readout circuits, respectively, to sum the one or more signals provided by the one or more readout circuits. The one or more readout circuits are coupleable to the photodiode of the photomultiplier array. Each readout circuit (5) comprises one or more coefficient controllers (C1, C2) for controlling multiplying coefficients of the received signal. The coefficient controllers may be placed at the input and/or at the output of the readout circuits (5).
Electric circuit
A transistor has variation in a threshold voltage or mobility due to accumulation of factors such as variation in a gate insulating film which is caused by a difference of a manufacturing process or a substrate to be used and variation in a crystal state of a channel formation region. The present invention provides an electric circuit which is arranged such that both electrodes of a capacitance device can hold a voltage between the gate and the source of a specific transistor. Further, the present invention provides an electric circuit which has a function capable of setting a potential difference between both electrodes of a capacitance device so as to be a threshold voltage of a specific transistor.
Medical amplifier isolation
This disclosure provides isolation for a medical amplifier by providing a low impedance path for noise across an isolation barrier. The low impedance path can include a capacitive coupling between a patient ground, which is isolated from control circuitry, and a functional ground of an isolation system that is isolated from earth ground. The low impedance path can draw noise current from an input of an amplifier of patient circuitry.
Low-Phase-Shift Variable-Gain Amplifier and Method for Processing Radio Frequency Signal
Provided are a low-phase-shift variable-gain amplifier and a method for processing a radio frequency signal. The low-phase-shift variable-gain amplifier comprises: a differential cascode amplification circuit, which comprises a common-source transistor and a common-gate transistor, wherein a gate stage of the common-source transistor is connected to a first bias voltage via a target resistor, and a gate stage of the common-gate transistor is connected to a second bias voltage; a current-steering structure, wherein one end of the current-steering structure is connected between the common-source transistor and the common-gate transistor, a third current signal outputted by the current-steering structure is used to adjust a gain of the differential cascode amplification circuit; and a phase compensation circuit, wherein one end of the phase compensation circuit is connected between the common-source transistor and the common-gate transistor.
POWER AMPLIFIER CIRCUIT, POWER AMPLIFIER APPARATUS, AND IMPEDANCE MATCHING DEVICE
A power amplifier circuit includes a first amplifier that amplifies a first signal that is one of balanced signals and outputs a first amplified signal from a first output terminal, a second amplifier that amplifies a second signal that is another of the balanced signals and outputs a second amplified signal from a second output terminal, a balun that generates a third signal from the first amplified signal and the second amplified signal, and a matching circuit that is provided between the first amplifier and the second amplifier, and the balun.
Amplifier with non-linearity cancellation
An amplifier circuit includes a primary differential amplifier circuit connected to receive a differential input and provide a primary differential output with a first non-linearity. A secondary differential amplifier circuit is connected to receive the differential input. The secondary differential amplifier circuit is configured to generate a secondary differential output with a second non-linearity. The secondary differential output and the primary differential output are coupled together with opposing polarities such that the second non-linearity cancels out at least the first non-linearity.