A unit amplifier has first and second transistors, which are cascode-connected, and a first variable resistance circuit. A base terminal or a gate terminal of the first transistor is connected to a cell input terminal, a collector terminal or a drain terminal of the second transistor is connected to a cell output terminal, an emitter terminal or a source terminal of the second transistor is connected to a collector terminal or a drain terminal of the first transistor, and one end of the first variable resistance circuit is connected to a connecting point of the first and second transistors.

Apparatus and methods for amplifier linearization are disclosed. In certain embodiments, an RF amplifier includes an RF input terminal that receives an RF input signal, an RF output terminal that provides an RF output signal, a gallium nitride field-effect transistor (GaN FET) having a gate connected to the RF input terminal and a drain connected to the RF output terminal. The GaN FET amplifies the RF input signal. The RF amplifier further includes a gallium arsenide field-effect transistor (GaAs FET) having a gate connected to the RF input terminal and a drain connected to the RF output terminal. The GaAs FET is operable to linearize the GaN FET.

Apparatus and methods for an improved-efficiency Doherty amplifier are described. The Doherty amplifier may include a two-stage peaking amplifier that transitions from an off state to an on state later and more rapidly than a single-stage peaking amplifier used in a conventional Doherty amplifier. The improved Doherty amplifier may operate at higher gain values than a conventional Doherty amplifier, with no appreciable reduction in signal bandwidth.

An amplifier module includes an antenna that includes four power feed points, and four power amplifiers. Output ends of the four power amplifiers are connected to the four power feed points in a one-to-one relationship. The four power feed points are arranged rotationally symmetrically around a center of the antenna when a main surface of the antenna is viewed in plan.

A power amplifier can include a carrier amplifier having first and second differential amplification cells with outputs coupled by a primary loop of a carrier transformer, and a peaking amplifier having first and second differential amplification cells with outputs coupled by a primary loop of a peaking transformer. The power amplifier can further include a combiner having a quarter-wave circuit implemented between the secondary loop of the carrier transformer and a secondary loop of the peaking transformer. The quarter-wave circuit can be configured to provide a characteristic impedance, such that the carrier and peaking amplifiers are presented with an impedance that is approximately the same as the characteristic impedance when both of the carrier and peaking amplifiers are turned on, and the carrier amplifier is presented with an impedance that is approximately twice the characteristic impedance when the carrier amplifier is turned on and the peaking amplifier is turned off.

Methods and apparatus for providing high efficiency power amplifiers for both high and low output power levels are disclosed. An example apparatus includes a first amplifier to amplify a signal from a host device; and transmit the amplified signal to an antenna; a second amplifier to amplify the signal from the host device; and transmit the amplified signal to the antenna; and first, second, and third switches to: when the first and second switches are closed and the third switch is open, couple the first amplifier to the second amplifier in a parallel structure; and when the first and second switches are open and the third switch is closed, couple the first amplifier to the second amplifier in a stacked structure.

An inverted three-stage Doherty amplifier is disclosed. The amplifier provides an input power divider, a carrier amplifier, two peak amplifiers, and an output combiner. The output combiner includes five quarter-wavelength (/4) lines, three of which correspond to the three amplifiers, one of which combines an output of the carrier amplifier with an output of the first peak amplifier, and the last of which combines the combined output of the carrier amplifier and the first peak amplifier with an output of the second peak amplifier. The five /4 lines have respective impedances to optionally adjust the output impedance of the respective amplifiers.

A power amplifier includes a two-dimensional matrix of NM active cells formed by stacking main terminals of multiple active cells in series. The stacks are coupled in parallel to form the two-dimensional matrix. The power amplifier includes a driver structure to coordinate the driving of the active cells so that the effective output power of the two-dimensional matrix is approximately NM the output power of each of the active cells.

Apparatus and methods for an inverted Doherty amplifier operating at gigahertz frequencies are described. RF fractional bandwidth and signal bandwidth may be increased over a conventional Doherty amplifier configuration when impedance-matching components and an impedance inverter in an output network of the inverted Doherty amplifier are designed based on characteristics of the main and peaking amplifier and asymmetry factor of the amplifier.

A power amplifier includes a two-dimensional matrix of NM active cells formed by stacking main terminals of multiple active cells in series. The stacks are coupled in parallel to form the two-dimensional matrix. The power amplifier includes a driver structure to coordinate the driving of the active cells so that the effective output power of the two-dimensional matrix is approximately NM the output power of each of the active cells.