A distributed amplifier includes: an input-side transmission line; M amplification circuits; M output-side transmission lines; and a combination circuit configured to combine outputs of the M output-side transmission lines; wherein the input-side transmission line has an input-side serial line formed by connecting in series MN unit transmission lines each including the same line length, and an input-side terminating resistor, the M amplification circuits each includes N amplifiers and the N amplifiers of the i-th amplification circuit take the input node of the ((k1) M+i)-th input-side transmission line to be the input, and the output-side transmission line includes an output-side serial line including N transmission lines each being connected in series between the neighboring outputs of the N amplifiers and each having a line width in which the phase of the output of the amplifier in each stage agrees with one another.

The disclosure relates to a circuit comprising a balun portion, a balanced side impedance transforming element and an unbalanced side impedance transforming element. The balun portion at least partly transforms the signal between a balanced signal input/output terminal and an unbalanced signal input/output terminal. The impedance transforming elements at least partly alter the impedance presented at the balanced and unbalanced side of the balun. In addition at least one matching transmission element is provided. By separating the role of impedance transformation from balun signal conversion, the useful bandwidth of the circuit can be improved in comparison to a balun that provides both signal conversion and impedance transformation functions.

An amplification stage and a wideband power amplifier are provided. The amplification stage includes a stage input terminal, a stage output terminal, an amplifier, an input compensation network, and in output compensation network. At the stage input terminal is received a signal which is provided via the input compensation network to the amplifier. The input compensation network filters the signal to allow a wideband operation of the amplification stage around an operational frequency. The amplified signal provided by the amplifier is provided via the output compensation network to the stage output terminal. The output compensation network configured to allow a wideband operation of the amplification stage around the operational frequency with a minimal phase shift and distortion of amplitude and phase frequency response. The wideband power amplifier includes a plurality of amplification stage combined with transmission lines or their lumped element equivalents in a specific circuit topology.

A Doherty amplifier of an embodiment includes an input terminal, an output terminal a splitter, a combiner, a carrier amplifier, a peak amplifier. The splitter is connected to the input terminal, the splitter having first and second outputs. The combiner is connected to the output terminal, the combiner having first and second inputs. The carrier amplifier includes a first input-side two-port network connected to the first output of the splitter, a first amplifier connected to an output of the first input-side two-port network, and a first output-side two-port network connected between an output of the first amplifier and the first input of the combiner. The peak amplifier includes a second input-side two-port network connected to the second output of the splitter, a second amplifier connected to the output of the second input-side two-port network, and a second output-side two-port network connected between an output of the second amplifier and the second input of the combiner. The combiner is a parallel-connected load type having a parallel connection of the output-side two-port network of the carrier amplifier and the output-side two-port network of the peak amplifier for the output terminal at a combining point. The load admittance at the combining point is expressed using a complex number.

An on-chip transformer circuit is disclosed. The on-chip transformer circuit comprises a primary winding circuit comprising at least one turn of a primary conductive winding arranged as a first N-sided polygon in a first dielectric layer of a substrate; and a secondary winding circuit comprising at least one turn of a secondary conductive winding arranged as a second N-sided polygon in a second, different, dielectric layer of the substrate. In some embodiments, the primary winding circuit and the secondary winding circuit are arranged to overlap one another at predetermined locations along the primary conductive winding and the secondary conductive winding, wherein the predetermined locations comprise a number of locations less than all locations along the primary conductive winding and the secondary conductive winding.

An amplifier device includes a first input terminal, a second input terminal, a first transistor having a first control electrode and first and second current-carrying electrodes, wherein the first control electrode is radio frequency (RF) coupled to the first input terminal and DC-coupled to a first bias network electrically coupled to the first control electrode, wherein the first bias network is configured to apply a first direct current (DC) bias to the first control electrode and is RF-isolated from the first control electrode. The amplifier device further includes a second transistor that includes a second control electrode that is RF coupled to the second input terminal and a second bias network electrically coupled to the second transistor, wherein the second bias network is configured to apply a second DC bias to the second transistor and is RF-isolated from the second transistor.

Embodiments relate to outphasing amplifiers and amplification. One example system includes a signal splitter configured to receive an input signal and output a plurality of signals, wherein the signal splitter shifts each of the plurality of signals by a distinct phase based at least in part on a power of the input signal; a plurality of power amplifiers (PAs), each configured to amplify a distinct signal of the plurality of signals to generate a distinct amplified signal; a plurality of input matching networks, each coupled to a distinct PA of the plurality of PAs and configured to transform an input impedance of the coupled PA to an outphasing load condition based on the distinct signal the coupled PA is configured to amplify; and a combiner configured to combine the plurality of distinct amplified signals to generate an amplified input signal.

The present disclosure relates to digital up-conversion for a multi-band Multi-Order Power Amplifier (MOPA) that enables precise and accurate control of gain, phase, and delay of multi-band split signals input to the multi-band MOPA. In general, a multi-band MOPA is configured to amplify a multi-band signal that is split across a number, N, of inputs of the multi-band MOPA as a number, N, of multi-band split signals, where N is an order of the multi-band MOPA and is greater than or equal to 2. A digital upconversion system for the multi-band MOPA is configured to independently control a gain, phase, and delay for each of a number, M, of frequency bands of the multi-band signal for each of at least N-1, and preferably all, of the multi-band split signals.

A distributed amplifier is disclosed having a plurality of amplifier sections, each having an input gate and an output drain, and a first plurality of inductive elements coupled in series between a DA input terminal and a gate termination terminal to form a first plurality of connection nodes. Each of the connection nodes is coupled to a corresponding adjacent pair of the first plurality of inductive elements and to a corresponding input gate of the plurality of amplifier sections. A second plurality of inductive elements is coupled in series between a drain termination terminal and a DA output terminal to form a second plurality of connection nodes, each being coupled to a corresponding adjacent pair of the second plurality of inductive elements and to a corresponding output drain of the plurality of amplifier sections. An active impedance termination circuitry has a termination output coupled to the drain termination terminal.

A configuration is provided with: a tuned line 13 that is connected between a branch terminal 3 and a branch terminal of branch lines 2 and 4; and a tuned line 14 that is connected between a combining terminal 7 and a combining terminal 9 of combining lines 10 and 11. This enables reduction of a non-uniform voltage distribution occurring due to a difference in characteristics between two amplifier elements 6 and 8.