There is provided a power amplifier arrangement for amplifying an input power signal to an output power signal. The power amplifier arrangement comprises a main amplifier having an input and an output. The power amplifier arrangement comprises at least one auxiliary amplifier, each having an input and an output. The power amplifier arrangement comprises a power divider having an input and outputs. The input of the power divider is configured to receive the input power signal. Each output of the power divider is connected to a respective input of the power amplifiers. The power amplifier arrangement comprises a Doherty combiner comprising at least one Ruthroff transformer and configured to combine all the outputs of the power amplifiers to, at an output of the Doherty combiner, produce the output power signal.

A high-efficiency amplifier is configured so that short stubs are provided in a line between a first substrate end and a second substrate end of a substrate, and among the short stubs, short stubs provided at locations other than both ends of the line include two short stubs and which are adjacent to each other, and which are provided at locations at which the two short stubs are to be electromagnetically coupled to each other.

A power amplifier arrangement (200) for amplifying an input signal to produce an output signal comprises a plurality N of amplifier sections (212, 213), a first input transmission line (221) comprising multiple segments and a first output transmission line (231) comprising multiple segments. Each amplifier section comprises one or more first transistors (T1) distributed along the first input transmission line (221) and the first output transmission line (231). Each amplifier section is configured to amplify a portion of the input signal to produce a portion of the output signal. A portion of the input signal is one of N portions of the input signal partitioned on any one or a combination of an amplitude basis and a time basis. The output signal is produced at an end of the first output transmission line (231) by building up N potions of the output signal from each amplifier section.

A radio frequency (RF) power amplifier includes an amplifying stage that includes an amplifying module, an input module and a feedback module. The amplifying module receives an RF to-be-amplified signal, and performs power amplification on the RF to-be-amplified signal to generate an RF output signal. The input module receives an RF input signal. The feedback module receives the RF output signal, cooperates with the input module to provide the RF to-be-amplified signal based on the RF input and output signals, and cooperates with the amplifying module to forma positive feedback loop that provides a loop gain which is less than one.

One illustrative high bandwidth transimpedance amplifier includes a distributed amplifier having multiple transistors that receive a propagating input signal at respective nodes of an input signal line and drive corresponding nodes of an amplified signal line that propagates an amplified signal to an output voltage buffer. A feedback impedance couples the output voltage to a feedback node in the distributed amplifier, making the output voltage proportional to the input signal's current. An illustrative method includes: propagating an input signal current along an input signal line of a distributed amplifier, the distributed amplifier responsively propagating an amplified signal along an amplified signal line; buffering the amplified signal from a final node of the amplified signal line to produce an output voltage signal; and using the output voltage signal to draw the input signal current from a final node of the input signal line via a feedback impedance.

An apparatus includes an input port, an output port, and a plurality of amplifier stages connected in parallel between the input port and the output port. Each of the amplifier stages comprises a common source field effect transistor (CSFET) and at least two common gate field effect transistors (CGFETs) coupled in series with a drain of the common source FET. At least one of the common gate field effect transistors of each stage includes a stabilizing network connected between drain and source diffusions.

Distributed amplifiers with controllable linearization are provided herein. In certain embodiments, a distributed amplifier includes a differential input transmission line, a differential output transmission line, and a plurality of differential distributed amplifier stages connected between the differential input transmission line and the differential output transmission line at different points or nodes. The distributed amplifier further includes a differential non-linearity cancellation stage connected between the differential input transmission line and the differential output transmission line and providing signal inversion relative to the differential distributed amplifier stages. The differential non-linearity cancellation stage operates with a separately controllable bias from the differential distributed amplifier stages, thereby providing a mechanism to control the linearity of the distributed amplifier.

An amplifier system with high gain, compact size, and extended bandwidth is disclosed. The amplifier system includes one or more inputs configured to receive one or more input signals and a pre-driver configured to receive the one or more input signals. The pre-driver may comprise source connected FETs which create a virtual ground and may include inductors which cancel or counter parasitic capacitance of the FETs. The pre-driver amplifies the one or more input signals to create one or more pre-amplified signals, which are provided to a voltage divider network configured to reduce a DC bias voltage of the one or more pre-amplified signals, while maintaining a wide bandwidth range. An amplifier receives and amplifies the output of the voltage divider network to create amplified signals. The amplifier may comprise mirrored FET pairs in a common source configuration and a common gate arrangement.

An embodiment is a multiplexer including a first distributed amplifier with an impedance matched to 50Ω, the first distributed amplifier configured to receive a first signal and output a first amplified signal, a second distributed amplifier with an impedance matched to 50Ω, the second distributed amplifier configured to receive a second signal and output a second amplified signal, and a passive multiplexer configured to multiplex the first amplified signal and the second amplified signal, and output a multiplexed signal to a signal output terminal, the passive multiplexer including a first resistor having a first end to receive the first amplified signal, a second resistor having a first end to receive the second amplified signal, and a third resistor having a first end connected to second ends of the first and second resistors and a second end connected to the signal output terminal.

Systems and methods are related to a distributed amplification. An amplification device can include cells including a first cell and a second cell and transmission lines including a first line and a second line. The first cell is coupled to the first line, and the second cell is coupled to the second line. The first line is configured to provide a first delay related to a delay between the first cell and the second cell. The device also includes a summer including a first input coupled to the first line and second input coupled to the second line. The summer is configured to provide an output signal.