Patent classifications
H03G1/0023
Methods of adjusting gain error in instrumentation amplifiers
A current feed-back instrumentation amplifier (CFIA) comprises a differential pair with degeneration for amplifying small differential voltages in the presence of large common-mode voltages. The CFIA includes input and feedback transconductors and a trimming circuit that trims the back-bias voltages of the transistors in each transconductor. The trimming circuit includes a plurality of selectable resistors disposed in the signal path of the tail current in each transconductor. Each of the plurality of selectable resistors has a switch coupled to it. When a switch is closed, only the resistors up to the respective switch are in the signal path of the bulk-to-source voltage of the differentially paired transistors. The resistor trimming circuit reduces the mismatch between transconductances of the respective differential pair transistors, in turn reducing mismatch of the overall transconductances of the transconductors, and thereby reducing the CFIA's gain error.
CIRCUIT AND A METHOD FOR OPERATING A CIRCUIT
A circuit containing a first cascode circuit and a second cascode circuit is proposed. The first circuit and the second cascode circuit are stacked between two power supply terminals. An output signal terminal of the circuit is coupled to a node connecting the first cascode circuit and the second cascode circuit. A first signal path is provided between the first cascode circuit and a common ground terminal and a second signal path is provided between the second cascode circuit and the common ground terminal.
Optimized Multi Gain LNA Enabling Low Current and High Linearity Including Highly Linear Active Bypass
An LNA having a plurality of paths, each of which can be controlled independently to achieve a gain mode. Each path includes at least an input FET and an output FET coupled in series. A gate of the output FET is controlled to set the gain of the LNA. Signals to be amplified are applied to the gate of the input FET. Additional stacked FETs are provided in series between the input FET and the output FET.
Tunable Effective Inductance for Multi-Gain LNA with Inductive Source Degeneration
A multi-gain LNA with inductive source degeneration is presented. The inductive source degeneration is provided via a tunable degeneration network that includes an inductor in parallel with one or more switchable shunting networks. Each shunting network includes a shunting capacitor that can selectively be coupled in parallel to the inductor. A capacitance of the shunting capacitor is calculated so that a combined impedance of the inductor and the shunting capacitor at a narrowband frequency of operation is effectively an inductance. The inductance is calculated according to a desired gain of the LNA. According to one aspect, the switchable shunting network includes a resistor in series connection with the shunting capacitor to provide broadband frequency response stability of the tunable degeneration network. According to another aspect, the LNA includes a plurality of selectable branches to further control gain of the LNA.
Variable gain distributed amplifier systems and methods
Distributed amplifier systems and methods are disclosed. An example distributed amplifier system includes first stage traveling wave amplifier (TWA) circuitry that is controllable to provide one of a first set of discrete gain settings. The first stage TWA circuitry includes a first input transmission line, a first output transmission line, and a first plurality of amplifiers coupled antiparallel between the first input transmission line and the first output transmission line. The first set of discrete gain settings has approximately constant logarithmic spacing.
Hybrid variable gain amplifier
Hybrid variable gain amplifiers and methods of controlling hybrid VGAs are disclosed. The hybrid VGA includes a first portion that provides a current path between a positive input and a positive output, and a current path either between the positive input and a negative output, in a first mode of operation, or between the positive input and a voltage source, in a second mode of operation. A second portion of the VGA provides a current path between a negative input and the negative output, and a current path either between the negative input and the positive output, in the first mode of operation, or between the negative input and the voltage source, in the second mode of operation. Control voltages selectively enable the paths in the first or second mode of operation. The control voltages further control amount of current flow in the enabled paths.
METHODS OF ADJUSTING GAIN ERROR IN INSTRUMENTATION AMPLIFIERS
A current feed-back instrumentation amplifier (CFIA) comprises a differential pair with degeneration for amplifying small differential voltages in the presence of large common-mode voltages. The CFIA includes input and feedback transconductors and a trimming circuit that trims the back-bias voltages of the transistors in each transconductor. The trimming circuit includes a plurality of selectable resistors disposed in the signal path of the tail current in each transconductor. Each of the plurality of selectable resistors has a switch coupled to it. When a switch is closed, only the resistors up to the respective switch are in the signal path of the bulk-to-source voltage of the differentially paired transistors. The resistor trimming circuit reduces the mismatch between transconductances of the respective differential pair transistors, in turn reducing mismatch of the overall transconductances of the transconductors, and thereby reducing the CFIA's gain error.
Amplifier
An amplifier of an embodiment includes: a plurality of input transistors of a plurality of differential pairs; a plurality of first resistance circuits mutually connecting respective sources of the input transistors corresponding to the differential pairs and mutually connecting the respective sources and reference potential points; a plurality of second resistance circuits being connected between the respective sources of the plurality of input transistors and the reference potential points, respectively; and a control circuit configured to generate a control signal controlling whether or not to electrically connect the plurality of first resistance circuits and the plurality of second resistance circuits to the respective sources of the input transistors.
Method of switching on and off a power amplifier, related power amplifier circuit, system and computer program product
Systems and methods for switching on and off a power amplifier including a signal input receiving an input signal and a signal output providing an output signal. The power amplifier includes a control input receiving a gain control signal indicating a requested gain and a control input receiving a mute control signal indicating whether the signal output should be switched on or switched off. A control unit determines whether the signal output of the power amplifier should be switched on and/or off, and if switched on receives data identifying a switch-on ramp and if switched off receives data identifying a switch-off ramp. The control unit generates the mute control signal to switch on the signal output of the power amplifier on or off, and generates the gain control signal as a function of the data identifying the switch-on or switch-off ramp to thereby increase or decrease the gain control signal.
VARIABLE GAIN OPTICAL MODULATOR WITH OPEN COLLECTOR DRIVER AMPLIFIER AND METHOD OF OPERATION
A distributed amplifier system comprising an impedance matching network configured to match an input impedance to an output impedance of the signal source, and a DC block configured to block DC components in the input signal. A variable gain amplifier adjusts the gain applied to the input signal based on a gain control signal to generate a gain adjusted signal. An emitter follower circuit receives and processes the gain adjusted signal to introduce gain peaking to create a modified signal. A distributed amplifier receives and amplifies the modified signal from the emitter follower circuit, to create an amplified signal. The distributed amplifier includes a termination network and one or more impedance matching elements configured for gain shaping the amplified signal. The gain peaking introduced by the emitter follower circuit is controlled by a variable current source. The distributed amplifier may be an open collector distributed amplifier.