Improved performance of analog computers is obtained by utilizing a deliberate reduction in gain of the gain elements present in the analog computer. While a prior output of the circuit (if any) is present, the gain of the gain elements is reduced to a level that is low enough that the input signal cannot propagate through the circuit. The input signal is then changed to a new value, or set of values, while the gain of the gain elements remains reduced. Finally, the gain of the gain elements is increased to a level that is high enough to allow the input signal to propagate through the circuit, resulting in an output that is a solution to the problem represented by the analog computer.

A driver circuit arrangement for driving a load and a differential drive arrangement thereof are provided. The driver circuit arrangement employs a dual feedback configuration with a feedback resistor and a current sensor feedback arrangement. The current sensor feedback arrangement provides a current feedback path from the amplifier output to the amplifier input, and has a current sensor resistor connected in an output current path of the driver circuit arrangement. A current feedback amplifier is present connected to the current sensor resistor and to the amplifier input.

A variable gain circuit includes: input/output terminals P1 and P2 configured to input/output a high frequency signal; a transistor having a signal terminal “a” connected to the input/output terminal P1, a signal terminal “b” connected to the input/output terminal P2, and a control terminal; bias terminals B1, B2 and B3, and a reference voltage terminal respectively set to a first variable voltage, a second variable voltage, a third variable voltage, and a fixed voltage that are independent of one another; an impedance element connected between the bias terminal B1 and the signal terminal a; an impedance element connected between the bias terminal B2 and the signal terminal b; an impedance element connected between the bias terminal B3 and the control terminal; and a first switch configured to switch between connecting and not connecting the reference voltage terminal and the control terminal.

An amplifier includes an amplification circuit, an equalization circuit, an output circuit, a first gain adjusting circuit, and a second gain adjusting circuit. The amplification circuit changes voltage levels of first and second amplification nodes based on first and second input signals. The equalization circuit changes the voltage levels of the first and second amplification nodes. The output circuit generates an output signal based on the voltage levels of the first and second amplification nodes. The first gain adjusting circuit changes voltage levels applied to the first and second amplification nodes based on the voltage levels of the first and second amplification nodes and a first gain control signal. The second gain adjusting circuit changes a voltage level of the output signal based on a second gain control signal.

A variable gain amplifier (VGA) is provided. The VGA includes at least one amplifier circuit, at least one current-steering circuit and at least one bias voltage circuit. Each current-steering circuit is coupled to its corresponding amplifier circuit. Each bias voltage circuit is coupled to its corresponding current-steering circuit to provide a positive bias voltage to each current-steering circuit.

A variable-gain amplifier and a phased array system are provided. A variable-gain amplifier includes a cascode circuit comprising a first amplification transistor and a second amplification transistor array that are cascaded, the second amplification transistor array comprising a plurality of second amplification transistors connected in parallel and configured to output an adjustable current to an output matching network, the first amplification transistor is a common-source transistor, the plurality of second amplification transistors are common-gate transistors, or the cascode circuit is a common-emitter common-base circuit, the first amplification transistor is a common-emitter amplification circuit, and the second amplification transistor array is a common-base amplification circuit. The variable-gain amplifier further including a variable capacitor circuit coupled to the second amplification transistor array and coupled to the output matching network at first nodes.

An LNA having a plurality of paths, each of which can be controlled independently to achieve a gain mode. Each path includes at least an input FET and an output FET coupled in series. A gate of the output FET is controlled to set the gain of the LNA. Signals to be amplified are applied to the gate of the input FET. Additional stacked FETs are provided in series between the input FET and the output FET.

A receiver includes an amplifier that receives a transmission signal and amplifies a first voltage difference between the transmission signal and a reference signal to generate a first output signal and a second output signal at a first node and a second node. An equalizer is provided, which is connected to the first node and the second node and receives the transmission signal. The equalizer compensates a common-mode offset between the first output signal and the second output signal based on a second voltage difference between an average voltage level of the transmission signal and the reference signal.

A signal amplifying circuit and associated methods and apparatuses, the circuit comprising: a signal path extending from an input terminal to an output terminal, a gain controller arranged to control the gain applied along the signal path in response to a control signal; an output stage within the signal path for generating the output signal, the output stage having a gain that is substantially independent of its supply voltage, and a variable voltage power supply comprising a charge pump for providing positive and negative output voltages, the charge pump comprising a network of switches that is operable in a number of different states and a controller for operating the switches in a sequence of the states so as to generate positive and negative output voltages together spanning a voltage approximately equal to the input voltage.

A variable-gain amplifier includes two amplification and attenuation branches, and first and a second resistive elements that are coupled between the two branches. Each branch includes a voltage follower stage and a configurable amplification stage. The voltage follower stages are intended to receive a differential signal and are configured to deliver, via the first resistive element, an intermediate differential current signal. The amplification stages are intended to receive the intermediate differential current signal and a digital control word, and are configured to deliver, via the second resistive element, an output differential voltage signal depending on the value of the digital control word.