Patent classifications
H03G1/0029
Measurement circuit for isolation product
A method includes generating a first current through a first node based on a differential pair of signals received by a differential pair of input nodes of a differential circuit of a first integrated circuit die of an isolator product. The method includes generating a second current through a second node. The second current matches the first current through the first node and is based on an attenuated version of an output measurement signal. The method includes generating the output measurement signal having a level corresponding to an average amplitude of the differential pair of signals based on the first current and the second current.
Optimized Multi Gain LNA Enabling Low Current and High Linearity Including Highly Linear Active Bypass
An LNA having a plurality of paths, each of which can be controlled independently to achieve a gain mode. Each path includes at least an input FET and an output FET coupled in series. A gate of the output FET is controlled to set the gain of the LNA. Signals to be amplified are applied to the gate of the input FET. Additional stacked FETs are provided in series between the input FET and the output FET.
AUTOMATIC GAIN CONTROL SYSTEM, CONTROL METHOD, POWER DETECTOR AND RADIO FREQUENCY RECEIVER
An automatic gain control system and a control method, a power detector and a radio frequency receiver are provided, wherein the power detector includes: a detection circuit, having a first and second input terminals connected to respective first and second differential output terminals of the trans-impedance amplifier, and configured to sample a peak of a differential output signal of the trans-impedance amplifier along with a clock cycle and provide a differential detection signal at a first output node; a filter circuit converts energy of the differential detection signal obtained at the first output node into an output voltage, so that the power detector may be used to detect an output power of the trans-impedance amplifier and adjust, by a control logic unit, a gain or an output power of a low noise amplifier connected to a radio frequency signal.
METHODS RELATED TO AMPLIFICATION OF RADIO-FREQUENCY SIGNALS
Methods related to amplification of radio-frequency signals. In some embodiments, a method for amplifying a radio-frequency signal can include configuring a gain stage to be in a selected one of a plurality of gain settings, with at least some of the gain settings resulting in different phases for the radio-frequency signal. The method can further include adjusting the phase of the radio-frequency signal for the selected gain setting, such that the adjusted phase is part of desired phases adjusted from the different phases.
Piecewise linear gain amplifier
A piecewise linear gain amplifier circuit includes a differential preamplifier and a plurality of transconductors. The differential preamplifier is electrically coupled to a differential input having an input voltage. The transconductors are electrically coupled in parallel with each other. Each transconductor includes a respective differential input that is electrically coupled to a differential output of the differential preamplifier. In addition, each transconductor includes a respective differential output that is electrically coupled to a common differential PWL output. Each transconductor has a different linear input range. An optional attenuation circuit can be electrically coupled in parallel to the differential preamplifier. The differential output of the attenuation circuit can be electrically coupled to a differential input of another transconductor, and that transconductor can have a differential output that is electrically coupled to the common differential PWL output.
CONTINUOUS TIME LINEAR EQUALIZATION (CTLE) FEEDBACK FOR TUNABLE DC GAIN AND MID-BAND CORRECTION
An analog front end (AFE) circuit including: a continuous time linear equalizer (CTLE) circuit; a transimpedance amplifier (TIA) connected to the CTLE circuit; and a feedback circuit including: a first transistor connected between a first output of the feedback circuit and a first node connected to a first current source; a second transistor connected between a second output of the feedback circuit and a second node connected to a second current source; and a first tunable resistor coupled between the first node and the second node, wherein: a first input of the feedback circuit is connected to a first output of the TIA; a second input of the feedback circuit is connected to a second output of the TIA; the second output of the feedback circuit is connected to a first input of the TIA.
PROGRAMMABLE GAIN AMPLIFIER WITH IMPEDANCE MATCHING AND REVERSE ISOLATION
A programmable gain amplifier includes a programmable resistor ladder deployed across N.sub.max junction nodes and controlled by N.sub.max−1 resistor control signals, where N.sub.max is an integer greater than one; a common-gate cascode amplifier multiplexer comprising N.sub.max common-gate cascode amplifiers configured to receive N.sub.max internal voltages at the N.sub.max junction nodes and output N.sub.max output currents in accordance with N.sub.max amplifier control signals, respectively, to an output node that is loaded with a load; and an AC (alternate current) coupling capacitor configured to couple an input node to the first junction node.
Ultra-high bandwidth inductorless amplifier
An amplifier has a first amplifying circuit configured to receive a voltage input and to output an amplified current, a second amplifying circuit configured to receive the amplified current and to output an amplified voltage, the second amplifying circuit comprising a pair of feedback resistive elements, each feedback resistive element being coupled to a gate and drain of a corresponding transistor in a pair of output transistors in the second amplifying circuit, and a feedback circuit configured to provide a negative feedback loop between an input and an output of the pair of output transistors, the feedback circuit including a first transconductance amplification circuit and a first equalizing circuit.
Multi-input amplifier with individual bypass paths
Described herein are variable gain amplifiers and multiplexers that embed programmable attenuators into switchable paths to provide variable gain for individual amplifier inputs. The variable gain for an individual input is provided using an amplification stage that is common for each input of the amplifier. A variable attenuation is provided for individual inputs through a combination of a band selection switch and an attenuation selection branch. Individual inputs can be configured to bypass the variable attenuation in a high gain mode.
Transistor bias adjustment for optimization of third order intercept point in a cascode amplifier
Methods and devices for amplifying an input RF signal according to at least two gain-states is described. According to one aspect, a multi gain amplifier circuit including a low noise amplifier having a stack of transistors is used for amplification of the input RF signal. When switching from a low gain-state to a high gain-state, the drain-to-source voltage of the output transistor of the stack is increased to affect region of operation of the output transistor, and thereby reduce non-linearity at the output of the amplifier. When switching from the high gain-state to the low gain-state, the drain-to-source voltage of the input transistor of the stack is increased to affect region of operation of the input transistor, and thereby reduce non-linearity at the output of the amplifier.