Patent classifications
H03G1/0029
CMOS trans-impedance amplifier
A CMOS trans-impedance amplifier includes an inverting amplifier circuit and a feedback resistor. The inverting amplifier circuit includes an input end and an output end, and the feedback resistor is coupled therebetween. The inverting amplifier circuit includes at least three sequentially-connected amplifier units, and each amplifier unit includes at least three sequentially-connected nFETs, namely an input signal receiving part nFET, an intermediate part nFET and a DC signal receiving part nFET. A common connection terminal of the input signal receiving part nFET and the intermediate part nFET is configured to output an amplified voltage signal.
Gain modulation circuit
A gain modulation circuit includes a load circuit, a differential circuit, a current source, a resistor, a first transistor, and a detector circuit. The load circuit is configured to receive a supply voltage. The differential circuit is coupled to the load circuit. The differential circuit and the load circuit are configured to generate a pair of output voltages according to a pair of input voltages and the supply voltage. The current source is coupled to the differential circuit. The resistor is coupled to the differential circuit and the current source. The first transistor is coupled to the differential circuit. The detector circuit is configured to generate a detection signal according to the pair of input voltages. A turned-on degree of the first transistor is adjusted based on the detection signal, to adjust a linear region of the gain modulation circuit.
CMOS triple-band RF VGA and power amplifier in linear transmitter
Methods and systems for amplifying signals are provided. Embodiments include a three-to-one multiplexer, a multiband RF variable gain amplifier (VGA), a multiband power amplifier driver (PAD), and a one-to three multiplexer. The three-to-one multiplexer receives three input signals from an RF frequency source and outputs an output signal corresponding one input signal. The multiband RF VGA receives the output signal of the three-to-one multiplexer, provides a first level of amplification to the signal received from the three-to-one multiplexer, and outputs an amplified version of the signal. The multiband PAD receives the signal output by the multiband RF variable gain amplifier and provides a second level of amplification to the signal and outputs an amplified version of the signal. The one-to-three multiplexer receives a signal output by the multiband PAD produces three output signals that correspond to each of the three input signals.
Chopper-stabilized programmable gain amplifier
A circuit including an amplifier having an input and an output. The circuit also includes a current-to-voltage amplifier having an input. The circuit further includes a current mirror coupled between the output of the amplifier and the input of the current-to-voltage amplifier. The current mirror is configured to chop current flowing through the first current mirror.
Adaptive degeneration circuits
This disclosure relates to variable-gain amplifiers that include degeneration circuits configured to adapt to a gain mode that is currently being implemented. For example, a variable-gain amplifier can operate in a plurality of gain modes to amplify a signal with different levels of amplification. The variable-gain amplifier can include a gain circuit configured to amplify a signal and a degeneration circuit coupled to the gain circuit. The degeneration circuit can include an inductor and a switching-capacitive arm coupled in parallel to the inductor. The degeneration circuit can operate based on a current gain mode to change an inductance for the variable-gain amplifier.
Chopper-stabilized programmable gain amplifier
A circuit including an amplifier having an input and an output. The circuit also includes a current-to-voltage amplifier having an input. The circuit further includes a current mirror coupled between the output of the amplifier and the input of the current-to-voltage amplifier. The current mirror is configured to chop current flowing through the first current mirror.
Radio frequency power amplifier circuit and gain control method
A radio frequency power amplifier circuit includes a controllable attenuation circuit, an input matching circuit, a drive amplification circuit, an inter-stage matching circuit, a power amplification circuit and an output matching circuit connected in sequence, and respectively configured to switch between a negative gain mode and a non-negative gain mode of the radio frequency power amplifier circuit based on a mode control signal, match the impedance between the controllable attenuation circuit and the drive amplification circuit, amplify a signal, configured to match the impedance between the drive amplification circuit and the power amplification circuit, amplify a signal, and match the impedance between the radio frequency power amplifier circuit and a post-stage circuit. A feedback circuit is connected across the drive amplification circuit, and is configured to adjust a gain.
Peak and gain calibration of a receiver in an isolation product
A method for calibrating a receiver of an isolator product includes adjusting a peaking frequency of a receiver signal path of a first integrated circuit die of the isolator product and a gain of the receiver signal path based on a predetermined peaking frequency, a predetermined gain, a first level of a diagnostic signal during a first interval, and a second level of the diagnostic signal during a second interval. The first interval and the second interval are non-overlapping intervals. The method may include receiving a calibration signal on a differential pair of nodes of the receiver signal path of the first integrated circuit die. The method may include generating a diagnostic signal corresponding to an average amplitude of a received version of the calibration signal.
Variable gain amplifier system including separate bandwidth control based on inductance contribution
A variable gain amplifier system includes a variable gain amplifier circuit configured to receive an input signal, apply a gain to the input signal, and generate an output signal in accordance with the gain applied to the input signal. The variable gain amplifier circuit is further configured to receive a gain control signal and a bandwidth control signal. A control module is configured to generate the gain control signal to adjust the gain of the variable gain amplifier circuit and generate, separately from the gain control signal, the bandwidth control signal to adjust a bandwidth of the variable gain amplifier circuit by selectively varying an amount of inductance contributed by an inductor circuit of the variable gain amplifier circuit.
Power amplifier equalizer
Circuits and methods for achieving good AM-AM and AM-PM metrics while achieving good power, PAE, linearity, and EVM performance in an amplifier. Embodiments provide an equalization approach which compensates for AM-AM and AM-PM variations in an amplifier by controlling bias voltage versus output power to alter the AM-AM and AM-PM profiles imposed by the amplifier. Differential amplifier embodiments include cross-coupled common-gate transistors that generate an equalization voltage that alters the gate bias voltage of respective main FETs in proportion to a power level present at the respective drains of the main FETs. Single-ended amplifier embodiments include an equalization circuit that alters the bias voltage to the gate of a main FET in proportion to a power level present at the main FET drain. Embodiments may also include a linearization circuit which alters the AM-PM profile of an input signal to compensate for the AM-PM profile imposed by a coupled amplifier.