H03G1/007

Radio frequency switch

A radio frequency switch is disclosed. The RF switch uses a combination of transistor technology and a topology to create an RF switch that has a high isolation and a high voltage breakdown at frequencies including those above a gigahertz.

Variable gain amplifier
11012045 · 2021-05-18 · ·

A variable gain amplifier circuit is disclosed. In one embodiment, an amplifier circuit includes first and second stages. Each stage includes one or more inverter pairs, with one inverter of each pair coupled to receive an inverting component of a differential signal and the other inverter of the pair coupled to receive a non-inverting component. The first stage receives a differential input signal and produces an intermediate differential signal. The second stage receives the intermediate differential signal and produces a differential output signal, the differential output signal being an amplified version of the differential input signal.

Method and system for linearizing an amplifier using transistor-level dynamic feedback
10979001 · 2021-04-13 ·

The present disclosure describes a method and system for linearizing an amplifier using transistor-level dynamic feedback. The method and system enables nonlinear amplifiers to exhibit linear performance using one or more of gain control elements and phase shifters in the feedback path. The disclosed method and system may also allow an amplifier to act as a pre-distorter or a frequency/gain programmable amplifier.

AMPLIFIER CIRCUITRY AND METHOD OF AMPLIFICATION
20210083638 · 2021-03-18 ·

An amplifier includes a first circuitry, a second circuitry, and a plurality of amplifier circuitries. The first circuitry controls an enable signal. The second circuitry controls a bias signal. Circuitries which output signals are decided from among the plurality of circuitries based on the enable signal, and each of the circuitries which output the signals amplifies an input signal with a gain corresponding to the bias signal.

Elementary cell and charge pumps comprising such an elementary cell

The elementary pumping cell comprises an input (E) receiving an input voltage (Vin), a clock terminal (H) receiving a first clock signal (CK1) and an output (S), a first capacitor (C1) having a first terminal connected to the clock terminal and a second terminal, a first transistor (A1) having a first source/drain terminal coupled to the input, a second source/drain terminal and a gate terminal, a second transistor (A2) having a first source/drain terminal, a second source/drain terminal coupled to the input and a gate terminal coupled to the second terminal of the first capacitor, a third transistor (A3) having a first source/drain terminal coupled to the first source/drain terminal of the second transistor, a second source/drain terminal coupled to the gate terminal of the second transistor and a gate terminal coupled to the input, and a fourth transistor (A4) having a first source/drain terminal coupled to the second source/drain terminal of the first transistor, a second source/drain terminal coupled to the first source/drain terminal of the second and third transistors and a gate terminal coupled to the input. The gate terminal of the first transistor is coupled to the gate terminal of the second transistor.

METHOD AND STRUCTURE FOR CONTROLLING BANDWIDTH AND PEAKING OVER GAIN IN A VARIABLE GAIN AMPLIFIER (VGA)
20210021246 · 2021-01-21 ·

A method of controlling bandwidth and peaking over gain in a variable gain amplifier (VGA) device and structure therefor. The device includes at least three differential transistor pairs configured as a cross-coupled differential amplifier with differential input nodes, differential bias nodes, differential output nodes, a current source node, and two cross-coupling nodes. The cross-coupled differential amplifier includes a load resistor coupled to each of the differential output nodes and one of the cross-coupling nodes, and a load inductor coupled to the each of the cross-coupling nodes and a power supply rail. A current source is electrically coupled to the current source node. The cross-coupling configuration with the load resistance and inductance results in a lower bandwidth and lowered peaking at low gain compared to high gain. Further, the tap point into the inductor can be chosen as another variable to tune the bandwidth and peaking in a communication system.

Biasing circuits for voltage controlled or output circuits
10868507 · 2020-12-15 ·

A number of biasing circuits for amplifiers including voltage controlled amplifier is presented. Also a number of field effect transistor circuits include voltage controlled attenuators or voltage controlled processing circuits. Example circuits include modulators, lower distortion variable voltage controlled resistors, sine wave to triangle wave converters, and or servo controlled biasing circuits.

Variable Gain Amplifier
20200382087 · 2020-12-03 ·

A variable gain amplifier circuit is disclosed. In one embodiment, an amplifier circuit includes first and second stages. Each stage includes one or more inverter pairs, with one inverter of each pair coupled to receive an inverting component of a differential signal and the other inverter of the pair coupled to receive a non-inverting component. The first stage receives a differential input signal and produces an intermediate differential signal. The second stage receives the intermediate differential signal and produces a differential output signal, the differential output signal being an amplified version of the differential input signal.

RADIO FREQUENCY SWITCH

A radio frequency switch is disclosed. The RF switch uses a combination of transistor technology and a topology to create an RF switch that has a high isolation and a high voltage breakdown at frequencies including those above a gigahertz.

Method and structure for controlling bandwidth and peaking over gain in a variable gain amplifier (VGA)
10833643 · 2020-11-10 · ·

A method of controlling bandwidth and peaking over gain in a variable gain amplifier (VGA) device and structure therefor. The device includes at least three differential transistor pairs configured as a cross-coupled differential amplifier with differential input nodes, differential bias nodes, differential output nodes, a current source node, and two cross-coupling nodes. The cross-coupled differential amplifier includes a load resistor coupled to each of the differential output nodes and one of the cross-coupling nodes, and a load inductor coupled to the each of the cross-coupling nodes and a power supply rail. A current source is electrically coupled to the current source node. The cross-coupling configuration with the load resistance and inductance results in a lower bandwidth and lowered peaking at low gain compared to high gain. Further, the tap point into the inductor can be chosen as another variable to tune the bandwidth and peaking in a communication system.