A circuit comprises a Sallen-Key filter, which includes a source follower that implements a unity-gain amplifier; and a programmable-gain amplifier coupled to the Sallen-Key filter. The circuit enables programmable gain via adjustment to a current mirror copying ratio in the programmable-gain amplifier, which decouples the bandwidth of the circuit from its gain settings. The programmable-gain amplifier can comprise a differential voltage-to-current converter, a current mirror pair, and programmable output gain stages. The Sallen-Key filter and at least one branch in the programmable-gain amplifier can comprise transistors arranged in identical circuit configurations.

Systems and methods for controlling current or mitigating electromagnetic or radiation interference effects using structures configured to cooperatively control a common semi-conductive channel region (SCR). One embodiment includes providing a metal oxide semiconductor field effect transistor (MOSFET) section formed with an exemplary SCR and two junction field effect transistor (JFET) gates on opposing sides of the MOSFET's SCR such that operation of the JFET modulates or controls current through the MOSFET's. With two JFET gate terminals to modulate various embodiments' signal(s), an improved mixer, demodulator, and gain control element in, e.g., analog circuits can be realized. Additionally, a direct current (DC)-biased terminal of one embodiment decreases cross-talk with other devices. A lens structure can also be incorporated into MOSFET structures to further adjust operation of the MOSFET. An embodiment can also include a current leakage mitigation structure configured to reduce or eliminate current leakage between MOSFET and JFET structures.

Exemplary embodiments of the present disclosure are related to reducing, and possibly preventing, gate inducted drain leakage for a switch. A device may comprise an amplifier and at least one transistor coupled in a feedback path of the amplifier. The device may also comprise a circuit configured to modulate a gate of the at least one transistor with a signal comprising a scaled-down and shifted version of a signal at a drain of the at least one transistor.

A method and electronic circuit for changing the gain of a radio frequency signal. The apparatus is an electronic circuit comprising one or more variable gain electronic elements, and one or more adjustable phase shifting elements. The method comprises the steps of receiving a radio frequency signal, varying the gain of the variable gain electronic element while the variable gain electronic element changes the amplitude of the radio frequency signal, and adjusting an adjustable phase shifting element to generate a reverse phase shift in the radio frequency signal in response to the associated phase shift from the step of varying the gain.

The present disclosure describes a method and system for linearizing an amplifier using transistor-level dynamic feedback. The method and system enables nonlinear amplifiers to exhibit linear performance using one or more of gain control elements and phase shifters in the feedback path. The disclosed method and system may also allow an amplifier to act as a pre-distorter or a frequency/gain programmable amplifier.

An attenuator arrangement comprising at least a first attenuation path configured to couple between a signal processing chain, SPC, and a measurement apparatus; said SPC comprising a first and second SPC terminal, said SPC configured to apply one or both of a gain and phase change on a signal passed between the SPC terminals; said measurement apparatus configured to measure one or both of the gain and the phase change applied by SPC by coupling to and receiving signals from said SPC terminals; wherein one of said first SPC terminal and said second SPC terminal is coupled to the measurement apparatus through said first attenuation path; and wherein the at least first attenuation path of the attenuator arrangement is configured to provide, selectively, for attenuation of the signal to the measurement apparatus to make the signal power of the signals from said SPC terminals more equal.

The present invention discloses a variable gain amplifier circuit having linearity compensation mechanism is provided. A lower amplification transistor of a lower branch of an amplification circuit is controlled by an AC input signal. Upper amplification transistors of an upper branch generate an AC output signal at an amplification output terminal. An amplification control circuit controls the turn-on and turn-off of the upper amplification transistor according to an amplification control voltage. An inductor is electrically coupled between a power supply terminal and the amplification output terminal. In a gain adjustment circuit, each of adjustment control circuits controls the turn-on and turn-off of each of adjustment transistors according to a adjustment control voltage. A first voltage adjustment circuit adjusts an impedance of each of the adjustment transistors to further adjust an AC cross voltage relation between the lower amplification transistor and the upper amplification transistors.

An attenuator circuit includes an input/output circuit that is provided at a stage preceding an power amplifier circuit, and a first control circuit that controls a gain of the input/output circuit. The input/output circuit includes at least a first resistor that is electrically connected between an input terminal and an output terminal, and a first FET that is electrically connected between the output terminal and a reference potential point. The first control circuit includes at least a second FET that has an ON resistance that is substantially equal to an ON resistance of the first FET at a time when a gate bias voltage that is the same as a gate bias voltage of the first FET is applied. A gate of the first FET and a gate of the second FET are electrically connected.

A continuous time linear equalizer (CTLE), comprising: a first transconductance gain circuit configured to amplify an input voltage signal with a first transconductance gain to generate a first current signal; a second transconductance gain circuit configured to amplify the input voltage signal with a second transconductance gain to generate a second current signal, wherein the second transconductance gain circuit is configured to reuse the first current signal to generate the second current signal; and at least one resistor through which the first current signal and the second current signal flow to generate an output voltage signal.

The disclosure relates to a current converter circuit. Example embodiments include a current converter circuit (600) for converting a linear input current (Ictrl_lin) to an exponential output current (Ictrl_sum), the current converter circuit (600) comprising first and second current converters (601, 602), each of which comprises: an input current branch (603.sub.1, 603.sub.2) with an input current source (604.sub.1, 604.sub.2) connected in series with a tuning voltage circuit (605.sub.1, 605.sub.2) and a tuning resistor (606.sub.1, 606.sub.2) between a supply voltage line (607) and a common voltage line (608); and an output current branch (609.sub.1, 609.sub.2) with an output transistor (610.sub.1, 610.sub.2) having a collector connected to an output node (611.sub.1, 611.sub.2), a emitter connected to the common voltage line (608) and a base connected to the tuning voltage circuit (605.sub.1, 605.sub.2), wherein the output nodes (611.sub.1, 611.sub.2) of the first and second current converters (601, 602) are connected to a summing output node (612) of the current converter circuit (600)