A gain adjustment circuit is coupled with a transmitting device and a receiving device that are in proximity to each other. The gain adjustment circuit receives a baseband signal that is generated based on gain signals and a power associated with a reception of a data packet by the receiving device. The gain adjustment circuit further receives previous transmission information of the transmitting device. The gain adjustment circuit predicts a time of transmission of a control packet from the transmitting device and determines whether the time of transmission overlaps with a time period of reception of the data packet by the receiving device. The gain adjustment circuit further generates and provides gain signals to the receiving device such that a signal interference during the transmission of the control packet and the reception of the data packet is mitigated.

A continuous time linear equalizer comprises an input of a first equalizer path configured to receive a first differential input signal; an input of a second equalizer path configured to receive a second differential input signal; a first programmable load capacitor coupled to an output of the first equalizer path; a second programmable load capacitor coupled to an output of the second equalizer path; and a programmable source capacitor coupled between the first equalizer path and the second equalizer path.

An AGC circuit for a radio receiver includes a detector converting a high frequency signal into a baseband signal. To reduce generation of a DC offset, the AGC circuit includes: a variable gain amplifier having an amplifier circuit and a high-pass filter, the amplifier circuit amplifying the baseband signal with a variable gain and the high-pass filter coupled to the amplifier circuit and having a cut-off frequency which is variable; a controller supplying a gain control signal; and a blocker temporarily blocking the high frequency signal. Using the block control signal, the controller causes the blocker to start blocking the high frequency signal, before the cut-off frequency of the high-pass filter is switched from high to low.

Examples provide a method of performing automatic gain control (AGC) in a wireless receiver, the method including computing, by an energy detection (ED) circuit, a variance in an output signal of an analog-to-digital converter (ADC), and activating, by the ED circuit, an AGC circuit to adjust a gain of at least one component in a radio frequency integrated chip (RFIC) in response to the variance exceeding a threshold. Examples also provide for a wireless receiver that implements such a method.

A device includes a variable gain amplifier, a voltage shifter, a variable gain amplifier half replica module, and an analog to digital converter. The variable gain amplifier includes an input terminal to receive an input signal, an output terminal to provide a first output signal that is biased based on a first common-mode voltage reference. The voltage shifter circuit includes first and second input terminals, and an output terminal to provide, to the analog to digital converter, a third output signal that is biased based on a second common-mode voltage reference. The variable gain amplifier half replica module includes an output terminal coupled to the second input terminal of the voltage shifter circuit, the variable gain amplifier half replica module to control the third output signal of the voltage shifter circuit based on the first common-mode voltage reference and the second common-mode voltage reference.

In connection with an RF communication system, exemplary aspects may involve a method and apparatus for use in a communication system in which a RF receiver may be detecting and processing a first signal in an RF channel. Thereafter, a second received signal may be detected, with the second received signal being assessed, by receiver circuitry, as stronger than the first received signal. In response to the assessment of the second received signal being stronger than the first received signal, the RF receiver circuitry may adjust the gain or signal amplification circuitry for continuing to process the second, stronger, received signal in place of the first, weaker, received signal.

A system for distributing broadband signals via twisted pair wiring is disclosed. Various aspects of the system involve use of a broadband signal distribution interface device and/or a broadband line driver. In one aspect, a broadband signal distribution interface device includes a broadband signal interface configured to receive broadband radio frequency signals, and a plurality of broadband signal connections configured to distribute broadband radio frequency signals. The interface device also includes circuitry defining an upstream signal path and a downstream signal path and including a gain control circuit and a slope control circuit each positioned along the downstream signal path. The circuitry is configured to accommodate downstream transmission of the broadband signals onto twisted pair wiring.

A device includes an amplifier having a first path and a second path and a first variable attenuator connected to the first path. The device includes a controller coupled to the first variable attenuator. The controller is configured to determine a magnitude of an input signal to the amplifier. When the magnitude of the input signal is below a threshold, the controller is configured to set an attenuation of the first variable attenuator to a first attenuation value. When the magnitude of the input signal is above the threshold, the controller is configured to set the attenuation of the first variable attenuator to a second attenuation value. The second attenuation value is less than the first attenuation value.

An example automatic gain control (AGC) circuit includes a base current-gain circuit having a programmable source degeneration resistance responsive to first bits of an AGC code word. The AGC circuit further includes a programmable current-gain circuit, coupled between an input and an output of the base current-gain circuit, having a programmable current source responsive to second bits of the AGC code word. The AGC circuit further includes a bleeder circuit, coupled to the output of the base current-gain circuit, having a programmable current source responsive to logical complements of the second bits of the AGC code word. The AGC circuit further includes a load circuit coupled to the output of the base current-gain circuit.

This disclosure relates to variable-gain amplifiers that include degeneration circuits configured to adapt to a gain mode that is currently being implemented. For example, a variable-gain amplifier can operate in a plurality of gain modes to amplify a signal with different levels of amplification. The variable-gain amplifier can include a gain circuit configured to amplify a signal and a degeneration circuit coupled to the gain circuit. The degeneration circuit can include an inductor and a switching-capacitive arm coupled in parallel to the inductor. The degeneration circuit can operate based on a current gain mode to change an inductance for the variable-gain amplifier.