H03G3/3052

Apparatus for radio-frequency receiver with reduced power consumption and associated methods

An apparatus includes a radio-frequency (RF) receiver. The RF receiver includes a single-balanced passive mixer driven by the output of a low noise amplifier (LNA) and a passive filter driven by an output of the single-balanced passive mixer. The RF receiver further includes a programmable gain amplifier (PGA) having an input resistance that generates noise, where the PGA is driven by an output of the passive filter, and the noise generated by the input resistance of the PGA is suppressed.

Packet-based radio receiver with automatic gain control
10177730 · 2019-01-08 · ·

A packet-based radio receiver (10) comprises an automatic gain control system (17) and a signal-level detector (18, 19, 20) for monitoring an analog signal derived from radio signals received by the radio receiver. The signal-level detector (18, 19, 20) comprises a binary memory cell (22, 24) and a monitoring system. The monitoring system comprises a comparator (21, 23) arranged to receive a reference voltage at a first input and the analog signal at a second input. The monitoring system is arranged to (i) continuously monitor the voltage of the analog signal, (ii) detect when the monitored signal exceeds the reference voltage, and (iii) store a predetermined binary value in the memory cell (22, 24) in response to such a detection. The automatic gain control system (17) is arranged to control the gain of a variable-gain component (12, 13, 14) of the radio receiver in dependence on the contents of the binary memory cell (22, 24).

Low noise amplifier arbiter for license assisted access systems

Methods and devices useful in concurrently receiving and supporting Wireless Fidelity (Wi-Fi) and Long Term Evolution Licensed Assisted Access (LTE-LAA) wireless data signals are provided. By way of example, an electronic device includes a front end module having an arbiter device that controls one or more gain stages to selectively amplify the Wi-Fi and LTE-LAA signals.

High-frequency semiconductor amplifier
10164594 · 2018-12-25 · ·

A circuit is formed on an SOI. The bias generator is connected to the gates of first and second transistors. In the bias generator, a first variable current source is connected to the power supply circuit via a power supply node. A third transistor is connected between the first variable current source and a ground-voltage source. A gate thereof is connected to the gate of the first transistor. A first operational amplifier controls a gate voltage of the third transistor so that a voltage at a second node between the first variable current source and the third transistor becomes almost equal to a reference-voltage. A first characteristics changer is connected to the gate of the third transistor or a second node, to change at least one loop gain characteristics and phase characteristics of a loop from the first operational amplifier, through the third transistor, to the first variable current source.

BROAD BAND AND NARROW BAND FREQUENCY RESPONSE EQUALIZATION
20180367348 · 2018-12-20 ·

A wireless communications system having at least one RIM associated with a remote unit. The RIMs and the remote units (RU) are configured for transmitting and receiving test signal over at least one narrow band of frequencies. The system includes a plurality of signal generators associated with a signal path, each signal generator configured for generating a test signal over the at least one narrow band of frequencies; a controller configured to generate a test signal for the signal path; and, an equalizer for adjusting gain for the signal path according to at least one of the narrow band of frequencies.

DYNAMIC AUDIO NORMALIZATION PROCESS
20240291456 · 2024-08-29 ·

Methods, systems, and apparatuses are described herein for improved processing audio in a video stream. A system may split audio in a frame of video content into multiple bands based on their audio levels. The system may then dynamically compress and dynamically normalize the audio level in each band. When dynamically compressing the bands, the system may determine, based on stored information, what audio level range is acceptable for an end user and may smooth and maintain the ranges of the audio to be within the acceptable range. The system may include the dynamically normalized and dynamically compressed frames as a second audio track in the video content. A computing device receiving the video content may select the second audio track during playback. If an end user selects the second audio track, the video is delivered with the modified sound of the second audio track.

Integrated circuit devices with receiver chain peak detectors

An integrated circuit device is provided. In some examples, the integrated circuit device includes an amplifier stage that receives an input signal and a control signal and provides an amplified signal in response. A main path is coupled to the amplifier stage that receives the amplified signal and provides a first feedback signal corresponding to a signal strength of a data-bearing portion of the input signal. A control path also receives the amplified signal and provides a second feedback signal corresponding to a signal strength of the data-bearing portion and an interference component. A gain control circuit is coupled to the main path and the control path that receives the first and second feedback signals and provides the control signal in response to the feedback signals. In some such examples, the control path and main path include separate mixer stages with different performance characteristics.

Automatic gain control for received signal strength indication

In some implementations, an automatic gain control (AGC) circuit comprises: a pre-divider circuit operable to pre-divide an input signal according to a pre-divider circuit setting and output a pre-divided signal; a pre-amplifier operable to pre-amplify the pre-divided signal and output a pre-amplified signal; a post-divider circuit operable to post-divide the pre-amplified signal according to a post-divider circuit setting; an analog-to-digital converter (ADC) operable to generate a digital data stream from the post-divided signal; logic operable to sample the digital data stream; determine a pre-divider circuit setting and a post-divider circuit setting based on the sampled data stream; set the pre-divider circuit and the post-divider circuit based on the determined settings; and generate a received signal strength value based on the pre-divider circuit setting and the post-divider circuit setting.

SCALABLE DYNAMIC RANGE ANALOG-TO-DIGITAL CONVERTER SYSTEM
20180358980 · 2018-12-13 ·

A scalable dynamic range analog-to-digital converter. In one instance, a method of scaling a dynamic range of an analog-to-digital converter is provided. The method includes operating the analog-to-digital converter at a first dynamic range. The method also includes receiving a radio frequency signal and detecting an on-channel signal level of the radio frequency signal. The method also includes when the on-channel signal level is above an on-channel threshold, operating the analog-to-digital converter at a second dynamic range. The method also includes when the on-channel signal level is below the on-channel threshold, operating the analog-to-digital converter at the first dynamic range.

Wakeup Receiver

Systems and methods providing a wakeup receiver for latency-critical applications are described herein. An example system includes a wakeup receiver communicatively coupled to a communication channel. The wakeup receiver is configured to monitor an input signal of the communication channel and down-convert the input signal to a DC signal. The system also includes an analog to digital converter (ADC) configured to digitize the DC signal and provide an ADC output. The system further includes a digital baseband (DBB) module configured to determine a received signal strength indication (RSSI) from the signal. The DBB is also configured to, for each packet, determine a respective packet length and compare the RSSI and respective packet length with a two-dimensional template. The DBB is additionally configured to, based on the comparison, determine an interrupt condition and, based on determining the interrupt condition, generate a wakeup signal.