H03G3/3089

Integrated transimpedance amplifier with a digital signal processor for high-speed optical receivers

An optical module includes an optical receiver with a complementary metal-oxide semiconductor (CMOS) transimpedance amplifier (TIA) and a digital signal processing (DSP) circuit. The DSP circuit is integrated with the CMOS TIA and facilitates adaptability of the CMOS TIA, and the CMOS TIA can adapt by using information provided by the DSP circuit.

Audio signal processing method and device for controlling loudness level

An audio signal processing device comprises: a receiver for receiving an input audio signal; a processor for generating loudness metadata corresponding to the input audio signal; and an outputter for transmitting the loudness metadata generated by the processor. The processor is configured to acquire loudness information analyzed from input content, acquires loudness information about the input audio signal by measuring the loudness of the input audio signal, generates the loudness metadata by converting the loudness information, and transmits, through the outputter, the generated loudness metadata to an output device for outputting the input audio signal.

A METHOD FOR IMPROVING DIE AREA AND POWER EFFICIENCY IN HIGH DYNAMIC RANGE DIGITAL MICROPHONES
20230246617 · 2023-08-03 ·

Exemplary multipath digital microphones described herein can comprise exemplary embodiments of automatic gain control and multipath digital audio signal digital signal processing chains, which allow low power and die size to be achieved as described herein, while still providing a high DR digital microphone systems. Further non-limiting embodiments can facilitate switching between multipath digital audio signal digital signal processing chains while minimizing audible artifacts associated with either the change in the gain automatic gain control amplifiers switching between multipath digital audio signal digital signal processing chains.

ANALOG RECEIVER FRONT-END WITH VARIABLE GAIN AMPLIFIER EMBEDDED IN AN EQUALIZER STRUCTURE
20230246885 · 2023-08-03 ·

A receiver has a first equalizer circuit that includes a first stage having a source degeneration circuit and a trans-impedance amplifier (TIA). The source degeneration circuit includes a resistor coupled in parallel with a capacitor. The TIA includes an embedded variable gain amplifier with a gain controlled by feedback resistors. Each feedback resistor is coupled between input and output of the TIA. In some implementations, the receiving circuit has a second equalizer circuit coupled in series with the first equalizer circuit. The second equalizer circuit includes a first stage having a source degeneration circuit and a TIA. The source degeneration circuit in the second equalizer circuit has a source degeneration resistor coupled in parallel with a source degeneration capacitor and the TIA includes an embedded variable gain amplifier whose gain is controlled by feedback resistors coupled between input and output of the TIA in the second equalizer circuit.

ENHANCED AUTOMATIC GAIN CONTROL FOR FULL-DUPLEX IN MILLIMETER WAVE SYSTEMS
20230299731 · 2023-09-21 ·

Methods, systems, and devices for wireless communications are described. In some cases, a device may perform a first analog to digital conversion (ADC) to generate a first set of samples of a wireless signal, and may attenuate the signal according to a dynamic range. The device may then perform a second ADC on the attenuated signal to generate a second set of samples, amplify the second set of samples, output whichever set of samples is greater. In some other cases, the second ADC may determine to attenuate the wireless signal based on an input power, amplify the signal, and output the amplified samples. In some other cases, the wireless device may determine an estimated input power of the wireless signal at a number of antenna elements. The device may then determine an adjustment to gain states of low-noise amplifiers (LNA) associated with each of the number of antenna elements.

METHOD, DEVICE, AND STORAGE MEDIUM FOR HYBRID AUTOMATIC GAIN CONTROL IN COMMUNICATION SYSTEM
20220029594 · 2022-01-27 ·

Embodiments of the present disclosure provide a method, a device, and a storage medium for hybrid automatic gain control in a communication system. The method includes amplifying an input signal to generate an amplified signal which is converted into a plurality of output signals; obtaining a moving average amplitude of a plurality of output signals of a current input signal; and calculating a signal amplitude difference according to the moving average amplitude and a desired output signal amplitude level; calculating a signal amplitude ratio according to a plurality of output signals of two previous output signal blocks and AGC gains corresponding to the plurality of output signals of the two previous output signal blocks; obtaining a step size according to the signal amplitude difference and the signal amplitude ratio; and calculating an AGC gain of the current input signal according to the step size and a corresponding previous AGC gain.

SYSTEMS AND METHODS FOR TIA BASE CURRENT DETECTION AND COMPENSATION
20210367563 · 2021-11-25 ·

Described herein are systems and methods that can adjust the performance of a transimpedance amplifier (TIA) in order to compensate for changing environmental and/or manufacturing conditions. In some embodiments, the changing environmental and/or manufacturing conditions may cause a reduction in beta of a bipolar junction transistor (BJT) in the TIA. A low beta may result in a high base current for the BJT causing the output voltage of the TIA to be formatted as an unusable signal output. To compensate for the low beta, the TIA generates an intermediate signal voltage, based on the base current and beta that is compared with the PN junction bias voltage on another BJT. Based on the comparison, the state of a digital state machine may be incremented, and a threshold base current is determined. This threshold base current may decide whether to compensate the operation of the TIA, or discard the chip.

AUDIO SIGNAL PROCESSING METHOD AND DEVICE FOR CONTROLLING LOUDNESS LEVEL

An audio signal processing device comprises: a receiver for receiving an input audio signal; a processor for generating loudness metadata corresponding to the input audio signal; and an outputter for transmitting the loudness metadata generated by the processor. The processor is configured to acquire loudness information analyzed from input content, acquires loudness information about the input audio signal by measuring the loudness of the input audio signal, generates the loudness metadata by converting the loudness information, and transmits, through the outputter, the generated loudness metadata to an output device for outputting the input audio signal.

Voltage sampler driver with enhanced high-frequency gain
11183982 · 2021-11-23 · ·

Methods and systems are described for receiving, at an input differential branch pair, a set of input signals, and responsively generating a first differential current, receiving, at an input of an offset voltage branch pair, an offset voltage control signal, and responsively generating a second differential current, supplementing a high-frequency component of the second differential current by injecting a high-pass filtered version of the set of input signals into the input of the offset voltage branch pair using a high-pass filter, and generating an output differential current based on the first and second differential currents using an amplifier stage connected to the input differential branch pair and the offset voltage branch pair.

Programmable continuous time linear equalizer having stabilized high-frequency peaking for controlling operating current of a slicer
11183983 · 2021-11-23 · ·

Methods and systems are described that include a differential amplifier driving an active load circuit, the active load circuit having a pair of load transistors and a high-frequency gain stage providing high frequency peaking for the active load circuit according to a frequency response characteristic determined in part by resistive values of a pair of active resistors connected, respectively, to gates of the pair of load transistors, and a bias circuit configured to stabilize the high frequency peaking of the high-frequency gain stage by generating a process-and-temperature variation (PVT)-dependent control voltage at gates of the active resistors to stabilize the resistive values of the pair of active resistors to account for PVT-dependent voltages at the gates of the pair of load transistors.