Patent classifications
H03G5/28
Compact Architecture for Multipath Low Noise Amplifier
Methods and devices used in mobile receiver front end to support multiple paths and multiple frequency bands are described. The presented devices and methods provide benefits of scalability, frequency band agility, as well as size reduction by using one low noise amplifier per simultaneous outputs. Based on the disclosed teachings, variable gain amplification of multiband signals is also presented.
Receiver for compensating common mode offset
A receiver includes an amplifier that receives a transmission signal and amplifies a first voltage difference between the transmission signal and a reference signal to generate a first output signal and a second output signal at a first node and a second node. An equalizer is provided, which is connected to the first node and the second node and receives the transmission signal. The equalizer compensates a common-mode offset between the first output signal and the second output signal based on a second voltage difference between an average voltage level of the transmission signal and the reference signal.
RECEIVING CIRCUIT, AND SEMICONDUCTOR APPARATUS AND SEMICONDUCTOR SYSTEM USING THE SAME
A receiving circuit may include a first amplifying circuit, a second amplifying circuit, a third amplifying circuit, and a feedback circuit. The first amplifying circuit amplifies a first input signal and a second input signal to generate a first amplified signal and a second amplified signal, respectively. The second amplifying circuit amplifies the first amplified signal and the second amplified signal to generate a first preliminary output signal and a second preliminary output signal, respectively. The third amplifying circuit amplifies the first preliminary output signal and the second preliminary output signal to generate a first output signal and a second output signal, respectively. The feedback circuit changes voltage levels of the first amplified signal and the second amplified signal based on a current control signal, the first output signal, and the second output signal.
AMPLIFIER WITH ADJUSTABLE HIGH-FREQUENCY GAIN USING VARACTOR DIODES
The detection matrix for an Orthogonal Differential Vector Signaling code is typically embodied as a transistor circuit with multiple active signal inputs. An alternative detection matrix approach uses passive resistor networks to sum at least some of the input terms before active detection.
SEMICONDUCTOR INTEGRATED CIRCUIT AND RECEIVER DEVICE
A semiconductor integrated circuit includes an equalizer circuit configured to amplify a signal component in a particular frequency band of an input signal on a signal path after a coupling capacitor, a sampler circuit configured to convert a first signal outputted from the equalizer circuit to a digital signal, a detector circuit configured to output a second signal based on a frequency of appearance of two values included in the digital signal, and a compensator circuit configured to compensate for a shift of a DC voltage level on the signal path after the coupling capacitor based on the second signal outputted from the detector circuit.
Circuits and Methods for Maintaining Gain for a Continuous-Time Linear Equalizer
A bias structure includes a reference voltage node connected to gate structures of a first NMOS transistor and a second NMOS transistor, a bias voltage node comprising a bias voltage, and a first op amp having a first input connected to the reference voltage, a second input connected to a drain of the first NMOS transistor, and an output connected to gate structures of a first PMOS transistor and a second PMOS transistor. The bias structure further includes a second op amp having a first input connected to the reference voltage, a second input connected to a drain of the second NMOS transistor, and an output connected to a gate structure of a third NMOS transistor and the bias voltage node. The first NMOS transistor matches a transistor of a differential pair of an integrated circuit device.
COMMUNICATION SYSTEM AND METHOD OF DATA COMMUNICATIONS
A communication system includes a transmitter configured to transmit a modulated signal, a transmission line configured to carry the modulated signal, and a receiver coupled to the transmitter by the transmission line, and configured to receive the modulated signal. The transmitter includes a modulator configured to generate the modulated signal responsive to a data signal and a carrier signal. The receiver includes a demodulator configured to demodulate the modulated signal responsive to a first carrier signal. The demodulator includes a filter and a gain adjusting circuit configured to adjust a gain of the filter, and to generate the set of control signals based on a voltage of the filtered first signal and a voltage of the first signal. The gain adjusting circuit includes a first peak detector coupled to the filter, and configured to detect a peak value of the voltage of the filtered first signal.
COMMUNICATION SYSTEM AND METHOD OF DATA COMMUNICATIONS
A communication system includes a transmitter configured to transmit a modulated signal, a transmission line configured to carry the modulated signal, and a receiver coupled to the transmitter by the transmission line, and configured to receive the modulated signal. The transmitter includes a modulator configured to generate the modulated signal responsive to a data signal and a carrier signal. The receiver includes a demodulator configured to demodulate the modulated signal responsive to a first carrier signal. The demodulator includes a filter and a gain adjusting circuit configured to adjust a gain of the filter, and to generate the set of control signals based on a voltage of the filtered first signal and a voltage of the first signal. The gain adjusting circuit includes a first peak detector coupled to the filter, and configured to detect a peak value of the voltage of the filtered first signal.
SIGNAL AMPLIFIERS THAT SWITCH BETWEEN DIFFERENT AMPLIFIER ARCHITECTURES FOR A PARTICULAR GAIN MODE
Disclosed herein are signal amplifiers having a plurality of amplifier cores. Individual amplifier cores can be designed to enhance particular advantages while reducing other disadvantages. The signal amplifier can then switch between amplifier cores in a particular gain mode to achieve desired performance characteristics (e.g., improving noise figure or linearity). Examples of signal amplifiers disclosed herein include amplifier architectures with a low noise figure amplifier core that reduces the noise figure and a linearity boost amplifier core that increases linearity. The disclosed signal amplifiers can switch between a first active core and a second active core for a single or particular gain mode to achieve desired signal characteristics during different time periods.
SIGNAL AMPLIFIERS THAT SWITCH BETWEEN DIFFERENT AMPLIFIER ARCHITECTURES FOR A PARTICULAR GAIN MODE
Disclosed herein are signal amplifiers having a plurality of amplifier cores. Individual amplifier cores can be designed to enhance particular advantages while reducing other disadvantages. The signal amplifier can then switch between amplifier cores in a particular gain mode to achieve desired performance characteristics (e.g., improving noise figure or linearity). Examples of signal amplifiers disclosed herein include amplifier architectures with a low noise figure amplifier core that reduces the noise figure and a linearity boost amplifier core that increases linearity. The disclosed signal amplifiers can switch between a first active core and a second active core for a single or particular gain mode to achieve desired signal characteristics during different time periods.