Patent classifications
H03G5/28
SYSTEM AND METHOD FOR CALIBRATING MICROPHONE CUT-OFF FREQUENCY
A system and method in an audio signal electrical circuit including a feedback loop with a digital filter coupled to a current digital to analog converter (IDAC) includes providing an output signal from the IDAC to analog elements of the audio signal electrical circuit, the output signal from the IDAC based upon a reference signal input to the IDAC when an output of the digital filter is not input to the IDAC. The system and method also include comparing an output signal of the audio signal electrical circuit to a reference, and calibrating the audio signal electrical circuit to correspond the output signal of the audio signal electrical circuit to the reference. Calibration of the audio signal electrical circuit enables more precise control of a cut-off frequency of a microphone signal when the output of the digital filter is input to the IDAC.
SYSTEM AND METHOD FOR CALIBRATING MICROPHONE CUT-OFF FREQUENCY
A system and method in an audio signal electrical circuit including a feedback loop with a digital filter coupled to a current digital to analog converter (IDAC) includes providing an output signal from the IDAC to analog elements of the audio signal electrical circuit, the output signal from the IDAC based upon a reference signal input to the IDAC when an output of the digital filter is not input to the IDAC. The system and method also include comparing an output signal of the audio signal electrical circuit to a reference, and calibrating the audio signal electrical circuit to correspond the output signal of the audio signal electrical circuit to the reference. Calibration of the audio signal electrical circuit enables more precise control of a cut-off frequency of a microphone signal when the output of the digital filter is input to the IDAC.
AMPLIFIER WITH INTEGRATED GAIN SLOPE EQUALIZER
The present disclosure describes systems and devices for gain slope equalization in a radio frequency (RF) amplifier (200). The RF amplifier (200) may include an input stage (210) for receiving an RF signal. In conjunction with the input stage (210), the RF amplifier (200) may incorporate an amplification stage (215) to amplify the RF signal. Coupled with the amplification stage (215) may be a transformer (220) including a first winding to receive the amplified RF signal, a second winding providing an RF output signal, and a resonator including a third winding that is coupled to the first and second windings. The resonator may be coupled to a circuit network which may be tuned to affect the resonance frequency and the gain slope of the RF output signal.
Receiving circuits and methods for increasing bandwidth
A receiving circuit and method for increasing bandwidth are provided. The receiving circuit includes a linear equalizer circuit and a variable gain amplifier. The linear equalizer circuit includes a first negative impedance converter, to generate a first capacitance. The variable gain amplifier is coupled to the linear equalizer circuit. The variable gain amplifier includes a first-stage gain circuit and a feedback circuit. The first-stage gain circuit is coupled to the feedback circuit, and the feedback circuit generates a zero-point at the output end of the first-stage gain circuit.
Multi-stage LNA with reduced mutual coupling
A low noise amplifier includes at least two variable gain amplifier stages, each variable gain amplifier configured to accept an input signal and to provide a load driving signal; a tunable bandpass filter connected as a load to each variable gain amplifier stage, wherein each bandpass filter includes a resonant tank, each resonant tank including an inductor, wherein each inductor of each resonant tank is oriented in orthogonal relation with respect to each respective longitudinal axis of each next inductor, the orthogonal relation of the respective longitudinal axes configured to reduce mutual coupling between the tunable bandpass filters; a cross-coupled transistor pair, and at least one cross-coupled compensation transistor pair biased in a subthreshold region configured to add a transconductance component as a function of a load driving signal; and, a controller circuit configured to tune each tunable bandpass filter.
Multi-stage LNA with reduced mutual coupling
A low noise amplifier includes at least two variable gain amplifier stages, each variable gain amplifier configured to accept an input signal and to provide a load driving signal; a tunable bandpass filter connected as a load to each variable gain amplifier stage, wherein each bandpass filter includes a resonant tank, each resonant tank including an inductor, wherein each inductor of each resonant tank is oriented in orthogonal relation with respect to each respective longitudinal axis of each next inductor, the orthogonal relation of the respective longitudinal axes configured to reduce mutual coupling between the tunable bandpass filters; a cross-coupled transistor pair, and at least one cross-coupled compensation transistor pair biased in a subthreshold region configured to add a transconductance component as a function of a load driving signal; and, a controller circuit configured to tune each tunable bandpass filter.
Variable gain amplifier with embedded equalization for uniform tuning
Certain aspects are directed to an amplifier. The amplifier generally includes a first transistor having a gate coupled to an input node of the amplifier, a source degeneration circuit, and a second transistor coupled between the source degeneration circuit and a source of the first transistor, a gate of the second transistor being configured to receive a gain control signal from a controller.
DIFFERENTIAL AMPLIFIER CIRCUIT HAVING VARIABLE GAIN
A differential amplifier circuit disclosed includes a first transistor, a second transistor, a field effect transistor (FET) connected between the first transistor and the second transistor, a first current source connected to the first transistor, a second current source connected to the second transistor, and a control circuit. The first transistor and the second transistor generates a differential output signal in accordance with an input signal and a reference signal. The control circuit includes a first resistor and a second resistor connected in series to each other between drain and source of the FET, a center node between the first resistor and the second resistor, a third resistor connected between gate of the FET and the center node, and a variable current source. The variable current source supplies a control current to the third resistor in accordance with a gain control signal. The control circuit controls on-resistance of the FET.
Communication system and method of data communications
A communication system includes a modulator configured to generate a modulated signal responsive to at least a data signal, and a demodulator configured to demodulate the modulated signal responsive to a first carrier signal. The demodulator includes a filter configured to generate a filtered first signal based on a first signal, and a gain adjusting circuit coupled to the filter. The first signal is based on the first carrier signal and modulated signal. The filter has a gain controlled by a set of control signals. The gain adjusting circuit is configured to adjust the gain of the filter, and to generate the set of control signals based on a voltage of the filtered first signal and a voltage of the first signal. The gain adjusting circuit includes a first peak detector coupled to the filter, and configured to detect a peak value of the voltage of the filtered first signal.
Communication system and method of data communications
A communication system includes a modulator configured to generate a modulated signal responsive to at least a data signal, and a demodulator configured to demodulate the modulated signal responsive to a first carrier signal. The demodulator includes a filter configured to generate a filtered first signal based on a first signal, and a gain adjusting circuit coupled to the filter. The first signal is based on the first carrier signal and modulated signal. The filter has a gain controlled by a set of control signals. The gain adjusting circuit is configured to adjust the gain of the filter, and to generate the set of control signals based on a voltage of the filtered first signal and a voltage of the first signal. The gain adjusting circuit includes a first peak detector coupled to the filter, and configured to detect a peak value of the voltage of the filtered first signal.