A bulk acoustic wave resonator includes a substrate, a support layer disposed on the substrate, the support layer including a cavity having a polygon shape with more than three sides in a plane crossing a first direction from the substrate to the support layer, a piezoelectric layer disposed on the support layer, a bottom electrode disposed below the piezoelectric layer, partially overlapping the cavity, and extending across a first side of the cavity, and a top electrode disposed above the piezoelectric layer, partially overlapping the cavity, and extending across a second side of the cavity. The bulk acoustic wave resonator further includes at least one release hole formed in the piezoelectric layer and overlapping a portion of the cavity.

An RF circuit device using modified lattice, lattice, and ladder circuit topologies. The devices can include four resonator devices and four shunt resonator devices. In the ladder topology, the resonator devices are connected in series from an input port to an output port while shunt resonator devices are coupled the nodes between the resonator devices. In the lattice topology, a top and a bottom serial configurations each includes a pair of resonator devices that are coupled to differential input and output ports. A pair of shunt resonators is cross-coupled between each pair of a top serial configuration resonator and a bottom serial configuration resonator. The modified lattice topology adds baluns or inductor devices between top and bottom nodes of the top and bottom serial configurations of the lattice configuration. These topologies may be applied using single crystal or polycrystalline bulk acoustic wave (BAW) resonators.

A method of forming a piezoelectric thin film can be provided by heating a substrate in a process chamber to a temperature between about 350 degrees Centigrade and about 850 degrees Centigrade to provide a sputtering temperature of the substrate and sputtering a Group III element from a target in the process chamber onto the substrate at the sputtering temperature to provide the piezoelectric thin film including a nitride of the Group III element on the substrate to have a crystallinity of less than about 1.0 degree at Full Width Half Maximum (FWHM) to about 10 arcseconds at FWHM measured using X-ray diffraction (XRD).

Acoustic resonators and filter devices. An acoustic resonator includes a substrate having a surface and a single-crystal piezoelectric plate having front and back surfaces. The back surface is attached to the surface of the substrate except for a portion of the piezoelectric plate forming a diaphragm spanning a cavity in the substrate. A conductor pattern formed is formed on the front surface of the piezoelectric plate, including an interdigital transducer (IDT) with interleaved fingers of the IDT on the diaphragm. The substrate and the piezoelectric plate are the same material.

An acoustic resonator device is formed that reduces a thermal coefficient of expansion mismatch between a piezoelectric plate and a silicon substrate by bonding the front surface of the silicon substrate having a filled and planarized sacrificial tub to a piezoelectric substrate and thinning the silicon substrate by removing material from a back surface. That back surface is then bonded to a handle wafer having a thermal coefficient of expansion (TCE) closer to a TCE of the piezoelectric substrate than a TCE of the silicon substrate and thinning the piezoelectric substrate to a target piezoelectric membrane thickness to form a piezoelectric plate. A conductor pattern is formed on the thinned piezoelectric plate and the sacrificial tub is removed to form a cavity and release a membrane of the piezoelectric plate using an etchant introduced through holes in the piezoelectric plate.

Acoustic resonators, filters, and methods. An acoustic resonator includes a substrate, a piezoelectric plate, and a diaphragm including a portion of the piezoelectric plate spanning a cavity in a substrate. An interdigital transducer (IDT) on a front surface of the piezoelectric plate includes first and second sets of interleaved interdigital transducer (IDT) fingers extending from first and second busbars respectively. The interleaved IDT fingers extend onto the diaphragm. Overlapping portions of the interleaved IDT fingers define an aperture of the acoustic resonator. First and second dielectric strips are on the front surface of the piezoelectric plate. Each dielectric strip has a first portion under the IDT fingers in a respective margin of the aperture and a second portion extending into a gap between the respective margin and the respective busbar.

A method of wafer scale packaging acoustic resonator devices and an apparatus therefor. The method including providing a partially completed semiconductor substrate comprising a plurality of single crystal acoustic resonator devices, each having a first electrode member, a second electrode member, and an overlying passivation material. At least one of the devices to be configured with an external connection, a repassivation material overlying the passivation material, an under metal material overlying the repassivation material. Copper pillar interconnect structures are then configured overlying the electrode members, and solder bump structures are form overlying the copper pillar interconnect structures.

A structure, comprising an island comprising a III-N material. The island extends over a substrate and has a sloped sidewall. A cap comprising a III-N material extends laterally from a top surface and overhangs the sidewall of the island. A device, such as a transistor, light emitting diode, or resonator, may be formed within, or over, the cap.

An RF triplexer circuit device using modified lattice, lattice, and ladder circuit topologies. The devices can include four resonator devices and four shunt resonator devices. In the ladder topology, the resonator devices are connected in series from an input port to an output port while shunt resonator devices are coupled to the nodes between the resonator devices. In the lattice topology, a top and a bottom serial configurations each includes a pair of resonator devices that are coupled to differential input and output ports. A pair of shunt resonators is cross-coupled between each pair of a top serial configuration resonator and a bottom serial configuration resonator. The modified lattice topology adds baluns or inductor devices between top and bottom nodes of the top and bottom serial configurations of the lattice configuration. These topologies may be applied using single crystal or polycrystalline bulk acoustic wave (BAW) resonators.

A method for fabricating an array of front ends for an array of packaged electronic components that each comprise: an electrical element packaged within a package comprising a front part of a package comprising an inner section with a cavity therein opposite the resonator defined by the raised frame and an outer section sealing said cavity; and a back part of the package comprising a back cavity in an inner back section, and an outer back section sealing the cavity, said back package further comprising a first and a second via through the back end around said at least one back cavity for coupling to front and back electrodes of the electronic component; the vias terminating in external contact pads that are coupleable in a ‘flip chip’ configuration to a circuit board; the method comprising the stages of: i. Obtaining a carrier substrate having an active membrane layer attached thereto by its rear surface, with a front electrode on the front surface of the active membrane layer; ii. Obtaining an inner front end section; iii. Attaching the inner front end section to the exposed front surface of the front electrode; iv. Detaching the carrier substrate from the rear surface of the active membrane layer; v. Optionally thinning the inner front section; vi. Processing the rear surface by removing material to create an array of at least one island of active membrane on at least one island of front electrode; vii. Creating an array of at least one front cavity by selectively removing at least outer layer of the inner front end section, such that there is one cavity opposite each island of membrane on the front side of the front electrode on the opposite side to the island of active membrane; viii. Applying an outer front end section to the inner front end section and bonding the outer front end section to an outer surface of the inner front end section such that the outer front end section spans across and seals the at least one cavity of the array of front cavities.