Fabrication of superconducting devices that combine or separate direct currents and microwave signals is provided. A method can comprise forming a direct current circuit that supports a direct current, a microwave circuit that supports a microwave signal, and a common circuit that supports the direct current and the microwave signal. The method can also comprise operatively coupling a first end of the direct current circuit and a first end of the microwave circuit to a first end of the common circuit. The direct current circuit can comprise a bandstop circuit and the microwave circuit can comprise a capacitor. Alternatively, the direct current circuit can comprise a bandstop circuit and the microwave circuit can comprise a bandpass circuit. Alternatively, the microwave circuit can comprise a capacitor and the direct current circuit can comprise one or more quarter-wavelength transmission lines.

A data sensing circuit includes one or more drive sense circuits operably coupled to a plurality of data sources. The one or more drive sense circuits produces a plurality of digital sense signals regarding the plurality of data sources at an oversampling rate. The data sensing circuit further includes a digital filtering circuit operably coupled to receive, in parallel, at least some of the plurality of digital sense signals and generate, in a serial manner, a plurality of affect values from the least some of the plurality of digital sense signals.

A filter includes a first low-pass filter and a second low-pass filter. The first low-pass filter is located at a first channel, and includes a first resistor array coupled with a complex-signal input terminal. The second low-pass filter is located at a second channel, and includes a second resistor array coupled with the complex-signal input terminal. The complex-signal input terminal is configured to provide complex signals to the first channel and the second channel. The filter further includes a third resistor array and a fourth resistor array. The third resistor array is cross-coupled between the first low-pass filter and the second low-pass filter. The fourth resistor array is coupled between the complex-signal input terminal and the third resistor array. The first resistor array, the second resistor array and the fourth resistor array include variable resistors.

An LC parallel resonant element includes a first planar or substantially planar conductor on a first base material layer and second and third planar or substantially planar conductors on second and third base material layers. The first and third planar or substantially planar conductors extend over nearly the entire surfaces of the first and third base material layers. The second planar or substantially planar conductor extends over nearly the entire length of the second base material layer in a second direction such that a space from the other end portion of two end portions of a multilayer body in a first direction is provided. The first and third planar or substantially planar conductors are connected to each other by interlayer conductors near the other end portion of the multilayer body. The first and second planar or substantially planar conductor are connected to each other by interlayer conductors near one end portion of the multilayer body.

A radio-frequency module component includes a splitter/combiner and a shield case. The splitter/combiner includes a multilayer body, a common input/output electrode, a low-band input/output electrode, a high-band input/output electrode, and outer ground electrodes. The multilayer body includes insulating layers and electrode patterns stacked on each other, and side surfaces opposed to each other. The common input/output electrode is disposed on one of the side surfaces and a bottom surface of the multilayer body. The low-band input/output electrode and the high-band input/output electrode are disposed on another of the side surfaces and the bottom surface of the multilayer body. An additional side surface of the multilayer body opposes a side surface of the shield case in the closest proximity to each other.

The invention relates to an HF circuit, for example for use in front-end circuits, having improved signal quality in carrier aggregation. According to the invention, a signal path between a duplexer and a diplexer comprises a phase shifter.

A computer-implemented method according to one embodiment includes performing anti-aliasing filtering on each of a plurality of signals, each signal having a frequency that is a different fraction of a frequency of a data read clock. An amplitude of each of the signals is measured after the anti-aliasing filtering. In response to the amplitudes of the signals being within a predefined range, anti-aliasing settings used during the anti-aliasing filtering are stored. In response to the amplitudes of the signals being outside the predefined range, the anti-aliasing settings are changed. A computer program product according to another embodiment includes a computer readable storage medium having program instructions embodied therewith. The computer readable storage medium is not a transitory signal per se. The program instructions are executable by a processing circuit to cause the processing circuit to perform the foregoing method.

A computer-implemented method, according to one embodiment, includes, performing anti-aliasing filtering on each of a plurality of symmetrical square wave signals, each symmetrical square wave signal having a frequency that is a different fraction of a frequency of a data read clock. The filtered symmetrical square wave signals are passed through a band pass filter. An amplitude of each of the symmetrical square wave signals is measured after the band pass filtering. In response to the amplitudes of the symmetrical square wave signals being within a predefined range, anti-aliasing settings used during the anti-aliasing filtering are stored. In response to the amplitudes of the symmetrical square wave signals being outside the predefined range, the anti-aliasing settings are changed.

A computer-implemented method, according to one embodiment, includes, performing anti-aliasing filtering on each of a plurality of symmetrical square wave signals, each symmetrical square wave signal having a frequency that is a different fraction of a frequency of a data read clock. The filtered symmetrical square wave signals are passed through a band pass filter. An amplitude of each of the symmetrical square wave signals is measured after the band pass filtering. In response to the amplitudes of the symmetrical square wave signals being within a predefined range, anti-aliasing settings used during the anti-aliasing filtering are stored. In response to the amplitudes of the symmetrical square wave signals being outside the predefined range, the anti-aliasing settings are changed.

Systems and methods according to one or more embodiments are provided for filtering of communication signals. Filtering may be implemented, for example, as a bandpass filter that is selectively tuned across a communication system frequency range to more effectively utilize the communication system bandwidth. In one example, a system includes a printed wiring board (PWB) and a filter implemented in the PWB. The filter includes first and second ports, an inductor comprising a plurality of vias extending through the PWB and a plurality of conductors connecting the plurality of vias to provide a plurality of coils between the first and second ports, and a plurality of capacitors disposed within the PWB. Additional systems and methods are also provided.