Patent classifications
H03H11/0422
NOTCH FILTER WITH SUCCESSIVE WINDOWED INTEGRATIONS, RELATED BAND-PASS FILTERING DEVICE, FREQUENCY DETECTION SYSTEM AND PROCESSING METHOD
This electronic notch filter is able to receive an input signal and deliver a filtered signal having an amplitude, at a cut-off frequency, that is attenuated with respect to that of the input signal.
It comprises a module for integrating the input signal during several successive time windows, each time window starting at a respective initial time instant and having a duration substantially equal to the inverse of the cut-off frequency, the initial temporal time instants of at least two distinct windows being separated by a temporal shift of a value greater than or equal to a predefined reference duration, each integration of the input signal during a respective temporal window resulting in a respective intermediate signal; and a module for summing the intermediate signals coming from the integration module; the filtered signal depending on the sum of said intermediate signals.
CALIBRATION METHOD, CORRESPONDING CIRCUIT AND APPARATUS
In accordance with an embodiment, a method of operating a piezoelectric transducer configured to transduce mechanical vibrations into transduced electrical signals at a pair of sensor electrodes includes stimulating a resonant oscillation of the piezoelectric transducer by applying at least one pulse electrical stimulation signal to the pair of sensor electrodes; detecting, at the pair of sensor electrodes, at least one electrical signal resulting from the stimulated resonant oscillation, wherein the at least one electrical signal resulting from the stimulated resonant oscillation oscillates at a resonance frequency of the piezoelectric transducer; measuring a frequency of oscillation of the at least one electrical signal resulting from the stimulated resonant oscillation to obtain a measured resonance frequency of the piezoelectric transducer; and tuning a stopband frequency of a notch filter coupled to the piezoelectric transducer to match the measured resonance frequency of the piezoelectric transducer.
Flicker noise elimination in a double balanced mixer DC bias circuit
A transmitter that reduces 3.sup.rd order harmonic (HD3) and inter modulation distortion (IMD3) for a gm stage of a mixer while reducing flicker noise is disclosed. The transmitter may include a balanced mixer, a transconductance stage connected to the mixer, and a bias circuit. The bias circuit may include a programmable current source configured to provide a reference current. Further, the bias circuit may include a replica circuit configured to replicate a DC signal of the transconductance stage. The bias circuit may also include a bias transistor configured to level shift a bias signal obtained from a signal source based on the reference current and the DC signal of the transconductance stage as determined from the replica circuit.
ELECTROMAGNETIC INTERFERENCE SUPPRESSION IN POWER CONVERTERS
In general, one aspect disclosed features an active choke circuit, comprising: a first three-winding choke; a second three-winding choke; and an amplifier; wherein a first winding of the first three-winding choke is electrically coupled in series with a first winding of the second three-winding choke; wherein a second winding of the first three-winding choke is electrically coupled in series with a second winding of the second three-winding choke; wherein a third winding of the first three-winding choke is electrically coupled to an input of the amplifier; and wherein a third winding of the second three-winding choke is electrically coupled to an output of the amplifier.
FLICKER NOISE ELIMINATION IN A DOUBLE BALANCED MIXER DC BIAS CIRCUIT
A transmitter that reduces 3.sup.rd order harmonic (HD3) and inter modulation distortion (IMD3) for a gm stage of a mixer while reducing flicker noise is disclosed. The transmitter may include a balanced mixer, a transconductance stage connected to the mixer, and a bias circuit. The bias circuit may include a programmable current source configured to provide a reference current. Further, the bias circuit may include a replica circuit configured to replicate a DC signal of the transconductance stage. The bias circuit may also include a bias transistor configured to level shift a bias signal obtained from a signal source based on the reference current and the DC signal of the transconductance stage as determined from the replica circuit.
Jitter attenuation buffer structure
A method and apparatus are described to implement a bandpass filter in a current mode logic (CML) stage of a clock tree in an electronic system. The bandpass filter has a bandpass filter transfer function to attenuate frequencies lower than and higher than a carrier frequency. The bandpass filter uses adjustable active inductors and capacitive source degeneration. Adjustable resistors may be controlled to move a peak frequency of the bandpass filter transfer function to a higher or lower frequency. The adjustable active inductors and capacitive degeneration may consist of field effect transistors.
Emulation of quantum and quantum-inspired dynamical systems with classical transconductor-capacitor circuits
We disclose transconductor-capacitor classical dynamical systems that emulate quantum dynamical systems and quantum-inspired systems by composing them with 1) a real capacitor, whose value exactly emulates the value of the quantum constant termed a Planck capacitor; 2) a quantum admittance element, which has no classical equivalent, but which can be emulated by approximately 18 transistors of a coupled transconductor system; 3) an emulated quantum transadmittance element that can couple emulated quantum admittances to each other; and 4) an emulated quantum transadmittance mixer element that can couple quantum admittances to each other under the control of an input. These four parts can be composed together to create arbitrary discrete-state, traveling-wave, spectral, or other quantum systems.
Polyphase filter
A first transistor (2a), a second transistor (2b), a third transistor (2c) and a fourth transistor (2d) are provided. A first transistor (2a) amplifies a first I signal V.sub.IP inputted from a first input terminal (1a). A second transistor (2b) amplifies a first Q signal V.sub.QP inputted from a second input terminal (1b). A third transistor (2c) amplifies a second I signal V.sub.IN when the second I signal V.sub.IN is inputted from a third input terminal (1c), the second I signal V.sub.IN forming a differential signal with the first I signal V.sub.IP. A fourth transistor (2d) amplifies a second Q signal V.sub.QN when the second Q signal V.sub.QN is inputted from a fourth input terminal (1d), the second Q signal V.sub.QN forming a differential signal with the first Q signal V.sub.QP.
Method of forming a semiconductor device and structure therefor
In one embodiment, a filter circuit is formed to include a transconductance amplifier. The filter circuit has one pair of capacitors connected between at least one input of the amplifier and an input signal that is to be filtered.
Large-signal GM3 cancellation technique for highly-linear active mixers
The present disclosure provides an apparatus that includes a first mixer circuit configured to convert between an RF signal and an IF signal based at least in part on an local oscillator (LO) signal. The first mixer circuit is electrically coupled to a first node that is configured to receive the LO signal and a first bias voltage, a second node that is configured to receive the RF signal or the IF signal, and a third node that is configured to provide the IF signal or the RF signal. The apparatus further includes a second mixer circuit electrically coupled to a fourth node configured to receive the LO signal and a second bias voltage, the second node, and the third node. The second bias voltage has a voltage level that is offset from the first bias voltage.