A phase shifter for altering the phase of a radio frequency signal is disclosed herein. A Lange coupler is used having reflective ports that are coupled to artificial transmission lines. The artificial transmission lines provide a reflection transmission path, the length of which can be determined by digital control lines. Transistors placed along the length of the central trace provide independent paths to ground that serve to shorten the electrical length of the ATL. Accordingly, by selectively turning the transistors on/off, the electrical length of the ATL can be selected and thus the amount of phase delay introduced by the phase shifter.

A delay line system for high frequency signal transmission comprises a first delay line and a second delay line that are each tapped. The first delay line comprises a first terminal and a second terminal, and the second delay line comprises a first terminal and a second terminal. The first delay line and the second delay line are configured in a manner whereby an analog input signal applied to the first terminal of the first delay line propagates through the first delay line in a first direction, a clock signal applied to the first terminal of the second delay line propagates through the second delay line in a second direction, and the first direction is opposite to the second direction. Further, an oscilloscope for measuring high frequency signals comprises an ADC, which comprises a high frequency sampler, which comprises such a delay line system.

A time delay circuit includes a first port, a second port, a reference path coupled between the first and second ports, a delay path coupled between the first and second ports, and a control circuit configured to activate one of the reference path and the delay path. The reference path includes a series transistor and a first inductor connected in parallel with the series transistor. The delay path includes a first shunt transistor, a second inductor connected in parallel with the first shunt transistor, and a first impedance inverter coupled between the first port and the first shunt transistor.