An adjustment method for filter units in a plasma processing apparatus includes a first measurement process of measuring a frequency characteristic of a reference filter unit selected among the filter units, and an adjustment process of adjusting a frequency characteristic of each of remaining filter units selected among the filter units excluding the reference filter unit. Further, the adjustment process includes an attachment process of attaching a capacitive member for adjusting a capacitance between wirings in each of the remaining filter units, a second measurement process of measuring a frequency characteristic of each of the remaining filter units to which the capacitive member is attached, and an individual adjustment process of adjusting a capacitance of the capacitive member such that the frequency characteristic of each of the remaining filter unit to which the capacitive member is attached becomes close to the frequency characteristic of the reference filter unit.

An impedance difference compensation circuit, a display panel and a mobile terminal, the impedance difference compensation circuit is applied in a display panel driving circuit and includes a resistance device, wherein, the resistance device includes at least one resistance.

An impedance difference compensation circuit, a display panel and a mobile terminal, the impedance difference compensation circuit is applied in a display panel driving circuit and includes a resistance device, wherein, the resistance device includes at least one resistance.

The present disclosure relates to a digital-to-analog converter (DAC) which includes a resistor string and a transfer function modification circuit. The transfer function modification circuit may be a calibration circuit for calibrating the DAC, The calibration circuit may include a plurality of current sources, which may be current DACs. Each of the current DACS inject current into, or drain current from, a respective node of the resistor string, in order to correct for voltage errors. The injected currents may be positive or negative, depending on the voltage error. The current DACs are controlled by trim codes, which are set dependent on the measured or simulated voltage errors for a given resistor string.

The present disclosure relates to a digital-to-analog converter (DAC) which includes a resistor string and a transfer function modification circuit. The transfer function modification circuit may be a calibration circuit for calibrating the DAC, The calibration circuit may include a plurality of current sources, which may be current DACs. Each of the current DACS inject current into, or drain current from, a respective node of the resistor string, in order to correct for voltage errors. The injected currents may be positive or negative, depending on the voltage error. The current DACs are controlled by trim codes, which are set dependent on the measured or simulated voltage errors for a given resistor string.

The present disclosure relates to a digital-to-analog converter (DAC) which includes a resistor string and a transfer function modification circuit. The transfer function modification circuit may be a calibration circuit for calibrating the DAC, The calibration circuit may include a plurality of current sources, which may be current DACs. Each of the current DACS inject current into, or drain current from, a respective node of the resistor string, in order to correct for voltage errors. The injected currents may be positive or negative, depending on the voltage error. The current DACs are controlled by trim codes, which are set dependent on the measured or simulated voltage errors for a given resistor string.

The present disclosure relates to a digital-to-analog converter (DAC) which includes a resistor string and a transfer function modification circuit. The transfer function modification circuit may be a calibration circuit for calibrating the DAC, The calibration circuit may include a plurality of current sources, which may be current DACs. Each of the current DACS inject current into, or drain current from, a respective node of the resistor string, in order to correct for voltage errors. The injected currents may be positive or negative, depending on the voltage error. The current DACs are controlled by trim codes, which are set dependent on the measured or simulated voltage errors for a given resistor string.

An antenna matching system includes an electronically tunable antenna matching circuit, a first directional coupler, a first gain and phase detector, a second directional coupler, a second gain and phase detector, and a controller. The first directional coupler is configured to receive forward and reflected signals. The first gain and phase detector is configured to output a first magnitude measurement and a first phase measurement based on the signals received at the first directional coupler. The second directional coupler is also configured to receive the forward and reflected signals. The second gain and phase detector is configured to output a second magnitude measurement based on the signals received at the second directional coupler. The controller is configured to: determine circuit parameters based on the first magnitude and phase measurements; tune the matching circuit based on the circuit parameters; and check for phase error based on the second magnitude measurement.

An antenna matching system includes an electronically tunable antenna matching circuit, a first directional coupler, a first gain and phase detector, a second directional coupler, a second gain and phase detector, and a controller. The first directional coupler is configured to receive forward and reflected signals. The first gain and phase detector is configured to output a first magnitude measurement and a first phase measurement based on the signals received at the first directional coupler. The second directional coupler is also configured to receive the forward and reflected signals. The second gain and phase detector is configured to output a second magnitude measurement based on the signals received at the second directional coupler. The controller is configured to: determine circuit parameters based on the first magnitude and phase measurements; tune the matching circuit based on the circuit parameters; and check for phase error based on the second magnitude measurement.

A method and a device for matching an impedance of pulse radio frequency plasma, and a plasma processing device are provided. In the method, a matched frequency is searched for sequentially in high radio frequency power phases of an i-th pulse period and multiple pulse periods following the i-th pulse period, and a specific modulation frequency determined in a process of searching for the matched frequency in a previous pulse is assigned as an initial frequency for the subsequent pulse. In this way, it is equivalent to increasing a width of a first radio frequency power phase of a pulse period. Therefore, by sequentially performing frequency modulation in the first radio frequency power phases of the multiple pulses, a matched frequency of pulse radio frequency plasma of a high pulse frequency can be found, thereby achieving impedance matching of plasma of a high pulse frequency.