Patent classifications
H03H17/0213
FRI SPARSE SAMPLING KERNEL FUNCTION CONSTRUCTION METHOD AND CIRCUIT
The invention discloses an FRI sparse sampling kernel function construction method and a circuit. According to the characteristics of an analog input signal and a subsequent parameter estimation algorithm, the method determines the criteria to be satisfied by the sampling kernel, designs a frequency response function of a Fourier series coefficient screening circuit, determines performance parameters of the frequency response function for the sampling kernel, and obtains a sampling kernel function after correction. The circuit is implemented with a Fourier series coefficient screening module and a phase correction module that are connected in cascade. The Fourier series coefficient screening module uses a Chebyshev II low-pass filtering circuit, and the phase correction module uses an all-pass filter circuit. Signals can be directly sparsely sampled according to the rate of innovation of the signals after passing through the sampling kernel circuit, and original characteristic parameters of the signals can be accurately recovered by a parameter estimation algorithm after sparse data is obtained. The FRI sparse sampling kernel provided in the invention is particularly suitable for an FRI sparse sampling system for pulse stream signals, the sampling rate is much lower than a conventional Nyquist sampling rate, and the data acquisition quantity is greatly decreased.
Transmitter module, receiver module and data transmission system
A transmitter module for a broadband data transmission system for radio communications, comprising at least one polyphase FFT filter bank is described. The at least one polyphase FFT filter bank is established as a synthesis polyphase FFT filter bank, wherein the at least one polyphase FFT filter bank comprises several filter units, wherein the transmitter module is configured to receive an input signal comprising a symbol sequence, and wherein the transmitter module is configured to transmit a signal based on the received input signal. Moreover, a receiver module for a broadband data transmission system and a data transmission system are described.
METHOD FOR FILTERING WITH ZERO LATENCY AND ASSOCIATED DEVICES
The invention relates to a method for filtering a numerical input signal sampled at a sampling frequency in order to obtain a filtered signal, the method including at least one step for: obtaining a first (respectively second) output signal by carrying out first (respectively second) operations on the first (respectively second) processing channel, the first (respectively second) operations including at least the application of a discrete Fourier transform to M/2.sup.p points on a signal coming from the input signal, the integer p being greater than or equal to 1, applying an inverse discrete Fourier transform to M/2.sup.p points on the first signal in order to obtain M points of the spectrum of the first signal, M being an integer strictly greater than 2, the application step being carried out by the addition of the results of two processing channels.
METHOD FOR SIMPLIFYING A FILTER AND ASSOCIATED DEVICES
The invention relates to a method for simplifying a sampled signal digital filter, the method including at least one step for: in order to obtain a first intermediate filter, gathering channels including discrete nonstationary operations relating to the same signal, the first channels including the nonstationary operations relating to a first signal and the second channels including the nonstationary operations relating to a second signal, in order to obtain a second intermediate filter, on each of the first channels and second channels, commutative stationary operations with the nonstationary operations, in order to eliminate the redundant nonstationary operations, and building the filter corresponding to the last obtained intermediate filter.
METHOD FOR FILTERING WITH REDUCED LATENCY AND ASSOCIATED DEVICES
The invention relates to a method for filtering a numerical input signal sampled at a sampling frequency in order to obtain a filtered signal, the method including at least one step for: obtaining a first (respectively second) output signal by carrying out first (respectively second) operations on the first (respectively second) processing channel, the first (respectively second) operations including at least the application of a discrete Fourier transform to M/2 points on a signal coming from the input signal, applying an inverse discrete Fourier transform to M/2 points on the first signal in order to obtain M points of the spectrum of the first signal, M being an integer strictly greater than 2, the application step being carried out by the addition of the results of two processing channels.
TRANSMITTER MODULE, RECEIVER MODULE AND DATA TRANSMISSION SYSTEM
A transmitter module for a broadband data transmission system for radio communications, comprising at least one polyphase FFT filter bank is described. The at least one polyphase FFT filter bank is established as a synthesis polyphase FFT filter bank, wherein the at least one polyphase FFT filter bank comprises several filter units, wherein the transmitter module is configured to receive an input signal comprising a symbol sequence, and wherein the transmitter module is configured to transmit a signal based on the received input signal. Moreover, a receiver module for a broadband data transmission system and a data transmission system are described.
RESOURCE CONSERVING WEIGHTED OVERLAP-ADD CHANNELIZER
Systems and methods are provided for channelizing. A first stage can provide a WOLA filter bank that can apply a single multiplier resource to perform window weighting for multiple WOLA filter banks. The first stage can remove mixer-based post FFT adjustment and provide equal functionality with a particular modification of tuning mixers at inputs of second stage FIR paths. The first stage can include a variable decimation, using a particular implementation of variable sample block size.
MEMORY DEVICE AND METHOD
A memory device includes a memory configured to store input data and filter data for a convolution operation, and a function processor configured to, in response to a read command of at least a portion of data from among the input data and the filter data, transform the at least a portion of the data based on a parameter of the convolution operation during a clock cycle corresponding to the read command and output a corresponding transformation result as transformed data.
FRACTIONAL FOURIER TRANSFORM-BASED SPECTRUM ANALYZER
Fractional Fourier Transform (FrFT)-based spectrum analyzers and spectrum analysis techniques are disclosed. Rather than using the standard Fast Fourier Transform (FFT), the FrFT may be used to view the signal content contained in a particular bandwidth. Usage of the FrFT in place of the frequency or time domain allows viewing of the signal in different dimensions, where spectral features of interest, or signal content, may appear where they were not visible in these domains before. This may allow signals to be identified and viewed in any domain within the continuous time-frequency plane, and may significantly enhance the ability to detect and extract signals that were previously hidden under interference and/or noise, provide or enhance the ability to extract signals from a congested environment, and enable operation in a signal-dense environment.
Resource conserving weighted overlap-add channelizer
Systems and methods are provided for channelizing. A first stage can provide a WOLA filter bank that can apply a single multiplier resource to perform window weighting for multiple WOLA filter banks. The first stage can remove mixer-based post FFT adjustment and provide equal functionality with a particular modification of tuning mixers at inputs of second stage FIR paths. The first stage can include a variable decimation, using a particular implementation of variable sample block size.