Multi-Nyquist differentiator circuits and a radio frequency sampling receiver that applies a multi-Nyquist differentiator circuit. A multi-Nyquist differentiator includes a fixed coefficient filter, a scaling circuit, and a summation circuit. The fixed coefficient filter is configured to filter digital samples generated by an ADC. The scaling circuit is coupled to an output of the fixed coefficient filter, and is configured to scale output of the fixed coefficient filter based on a selected Nyquist band. The summation circuit is coupled to the scaling circuit, and is configured to generate a derivative of the digital samples based on output of the scaling circuit.

A receiving device includes: a resampler to convert a sampling rate of a reception signal, and output a first signal that is a signal having been subjected to sampling rate conversion; an equalizer to perform an adaptive equalization process using the first signal as an input, and output a second signal that is a signal having been subjected to the adaptive equalization process and having a sampling rate that is an integer fraction of an input signal; a correlation calculator to calculate a correlation function between the first signal and the second signal; and a rate controller to control a rate conversion ratio for sampling rate conversion in the resampler on a basis of the correlation function.

One example includes a digital signal conditioner (DSC) system. A sample selector bank receives a digital sample block of an input signal that is provided at a supported input oversampling factor and selects a subset of samples from the digital sample block based on a selection signal. A tap weights selector bank generates a set of tap weights based on the selection signal. A filter bank receives the subset of the samples from each of the sample selectors and a respective set of tap weights. Each filter provides a weighted sample associated with the respective subset of samples and the respective set of tap weights. A reformattor receives the weighted sample from each of the filters and provides a filtered sample block including the weighted sample from a subset of the filters at an output oversampling factor for each supported input oversampling factor based on a selected supported resampling ratio.

One example includes a digital signal conditioner (DSC) system. A sample selector bank receives a digital sample block of an input signal that is provided at a supported input oversampling factor and selects a subset of samples from the digital sample block based on a selection signal. A tap weights selector bank generates a set of tap weights based on the selection signal. A filter bank receives the subset of the samples from each of the sample selectors and a respective set of tap weights. Each filter provides a weighted sample associated with the respective subset of samples and the respective set of tap weights. A reformattor receives the weighted sample from each of the filters and provides a filtered sample block including the weighted sample from a subset of the filters at an output oversampling factor for each supported input oversampling factor based on a selected supported resampling ratio.

A radio communication receiver and a method performed by the radio communication receiver for configuring a Notch filter of the radio communication receiver. The method comprises retrieving stored and previously determined filter coefficients from a set of filter coefficients, where the retrieved filter coefficients constitute a fraction of the total number of filter coefficients; and setting the rest of the filter coefficients to one. The method further comprises normalising the retrieved filter coefficients; and transforming the filter coefficients such that the Notch position ends up at the one or more frequencies to be filtered out.

An FIR filter includes: an address signal generation unit configured to generate an address signal of an address value in accordance with k bit values that correspond to k filter coefficients having a symmetric property; and an extraction unit configured to extract a computation result that corresponds to the address value indicated by the address signal from the table, in which, in the table, a plurality of computation results in which sets of computation results indicating the same values among 2 to the power of k patterns of computation results which are obtained by adding up k results of multiplication, the k results of multiplication being results obtained by multiplying each of k filter coefficients having a symmetric property by each of k bit values that correspond to k filter coefficients are commonly shared, and the plurality of address values are associated with each other.

A filter device includes: delay units serially connected to delay an input signal and output a delayed signal; multiplication units multiplying the delayed signal by a filter coefficient based on a predetermined value and a multiplying factor adjustment value; a coefficient adjustment unit that, when a multiplication result obtained by multiplying the predetermined value by the multiplying factor adjustment value exceeds a maximum value of a filter-coefficient representation range, divides the multiplication result exceeding the maximum value by the maximum value, and outputs a quotient of division as a coefficient adjustment value; a signal conversion unit outputting a signal obtained by adding after-filter-coefficient-multiplication signals outputted by the multiplication units and an adjusted signal obtained by adjusting a corresponding delayed signal using the coefficient adjustment value; and a division unit generating an output signal by dividing the signal outputted by the signal conversion unit by the multiplying factor adjustment value.

An integrated circuit for generating an equalized signal, according to a channel, from serial data includes a shift register that extracts a symbol sequence from the serial data. A data storage stores values of an equalized digital signal corresponding to potential symbol sequences corresponding to a filter coefficient sequence. A lookup table outputs the equalized digital signal of a value corresponding to the extracted symbol sequence. A digital-to-analog converter (DAC) converts the equalized digital signal into the equalized signal. A controller refreshes the lookup table, based on at least one of values stored in the data storage and values included in the lookup table, in response to a control signal.

This application relates to an optimization for a technique for filtering an input signal according to a convolution kernel that is stored in a floating point format. A method for filtering the input signal includes: receiving a set of filter coefficients that define the convolution kernel; determining an order for a plurality of floating point operations configured to generate an element of an output signal; and filtering the input signal by the convolution kernel to generate the output signal. Each floating point operation corresponds with a particular filter coefficient, and the order for the plurality of floating point operations is determined based on a magnitude of the particular filter coefficient associated with each floating point operation. The filtering is performed by executing the plurality of floating point operations according to the order. The data path can be a half-precision floating point data path implemented on a processor.

Example embodiments disclosed herein relate to filter coefficient updating in time domain filtering. A method of processing an audio signal is disclosed. The method includes obtaining a predetermined number of target gains for a first portion of the audio signal by analyzing the first portion of the audio signal. Each of the target gains is corresponding to a subband of the audio signal. The method also includes determining filter coefficients for time domain filtering the first portion of the audio signal so as to approximate a frequency response given by the target gains. The filter coefficients are determined by iteratively selecting at least one target gain from the target gains and updating the filter coefficient based on the selected at least one target gain. Corresponding system and computer program product for processing an audio signal are also disclosed.