A frequency extraction filter is disclosed. The frequency extraction filter can include a resonator that is coupled to a first node, and a phase shifter that is connected to the resonator in series. The phase shifter is coupled to a second node such that the resonator and the phase shifter are positioned between the first and second nodes. Impedance between the first and second nodes has an order of four or more.

A frequency extraction filter is disclosed. The frequency extraction filter can include a resonator that is coupled to a first node, and a phase shifter that is connected to the resonator in series. The phase shifter is coupled to a second node such that the resonator and the phase shifter are positioned between the first and second nodes. Impedance between the first and second nodes has an order of four or more.

Proposed are an apparatus for and a method of optimizing a parameter of a notch filter for use in an electric power steering apparatus to eliminate noise and vibration occurring in the electric power steering apparatus. The apparatus includes: a communication interface, and a processor operatively connected to the communication interface, wherein the processor receives through the communication interface a torque signal from a torque sensor detecting column torque resulting from rotation of a steering wheel, detects an optimal value for a notch depth of the notch filter that minimizes a function value of an objective function that is defined as a mean squared error between the torque signal and a preset target torque signal of the notch filter, and applies the optimal value to the notch filter.

An interference removal filter that includes a combination of a first filter and a second filter, where the first filter passes signals over a frequency range of size B with a variation of less than +/3 dB, where the peak value of the impulse response of the second filter is displaced in time from the peak value of the impulse response of the first filter by at least 2/B time units, and where the combination of the first filter and the second filter produces a notch in frequency at a frequency location within the frequency range.

A digital filter includes integrator circuits configured to operate based on a clock of a sampling frequency f.sub.S that is equal to a sampling frequency of input data and determine a sum of the input data on a sample-by-sample basis, a frequency converter circuit configured to perform decimation on data of the sampling frequency f.sub.S to reduce the sampling frequency f.sub.S to a sampling frequency f.sub.D=f.sub.S/N, one or more differentiator circuits configured to operate based on a clock of the sampling frequency f.sub.D and subtract data of an immediately preceding sample from the input data, a differentiator circuit for removal of 50 Hz configured to operate based on the clock of the sampling frequency f.sub.D and subtract, from the input data, data preceding the input data by a plurality of samples, and a differentiator circuit for removal of 60 Hz configured to operate based on a clock of the sampling frequency f.sub.D and subtract, from the input data, data preceding the input data by a plurality of samples.

The present disclosure includes systems and techniques relating to time-varying notch filter. In one implementation, an apparatus includes a time-variant notch filter and a controller. The time-variant notch filter includes a notch depth and a notch bandwidth centered on a notch frequency. At least one of the notch depth or the notch bandwidth is based on a coefficient of the notch filter. The controller is configured to estimate a power of a packet being received and compare the estimated power of the packet to a predetermined threshold. The controller is also configured to set, conditioned on determining that the estimated power of the packet is greater than the predetermined threshold, a value of the coefficient to a first value such that the packet bypasses the time-variant notch filter.

To suppress an unstable operation of a device caused by filtering, an output selection unit is configured to acquire an unfiltered value representing an input signal (signal before filtering) stored in an input holding unit, a filtered value representing a signal acquired by filtering the input signal by a filtering unit, and a previous output value representing an output signal output at a previous time, select a middle value out of the filtered value, the unfiltered value, and the previous output value, and set the selected middle value as a current output value of an output signal.

A circuit device includes an A/D conversion circuit that A/D converts a signal output from a sensor element, an interface circuit that receives filter setting data that determines a characteristic of each of a plurality of digital filtering processes, a storage circuit that stores the filter setting data, and a signal processing circuit that sequentially performs each of the plurality of digital filtering processes with characteristics determined by the filter setting data on a digital signal output from the A/D conversion circuit.