A signal output device is provided in a communication apparatus. The communication apparatus communicates with a different one of the communication apparatus using a single line. The signal output device includes a signal output unit. The signal output unit includes a first filter and a second filter. The first filter is provided by a Bessel filter. The second filter is provided by a Chebyshev filter or a Butterworth filter. The signal output unit outputs a signal which is obtained by passing a predetermined signal through the first filter and the second filter. The signal output from the signal output unit has a pass characteristic of the first filter and a pass characteristic of the second filter. A cutoff frequency of the first filter is set to be lower than a cutoff frequency of the second filter.

A signal output device is provided in a communication apparatus. The communication apparatus communicates with a different one of the communication apparatus using a single line. The signal output device includes a signal output unit. The signal output unit includes a first filter and a second filter. The first filter is provided by a Bessel filter. The second filter is provided by a Chebyshev filter or a Butterworth filter. The signal output unit outputs a signal which is obtained by passing a predetermined signal through the first filter and the second filter. The signal output from the signal output unit has a pass characteristic of the first filter and a pass characteristic of the second filter. A cutoff frequency of the first filter is set to be lower than a cutoff frequency of the second filter.

An upper limit of a frequency range of audio indicated by input audio data is detected. A representative point extraction unit downsamples the input audio data to a sampling rate set to be less than or equal to twice the detected upper limit to obtain representative-point audio data. An interpolation processing unit upsamples the representative-point audio data by using a fractal interpolation function (FIF) that uses a mapping function calculated by a mapping function calculation unit, while using the input audio data, if necessary, to generate high-frequency interpolated audio data.

A first stage of a digital filter received input data to be filtered, the first stage of a digital filter operating at a first clock; a second stage of the digital filter outputs filtered output data, the second stage of the digital filter operating on a second clock, wherein a ratio of a frequency of the first clock and a frequency of the second clock is a fractional number, and a frequency of the second clock is higher than a frequency of the first clock; the first stage receives an indication of a ratio of the first clock and the second clock; and the first stage receives an indication of a time offset between (1) a clock pulse of the second clock, which occurs between a first clock pulse and (2) the first clock pulse of the first clock.

Embodiments of the invention may be used to implement a rate converter that includes: 6 channels in forward (audio) path, each channel having a 24-bit signal path per channel, an End-to-end SNR of 110 dB, all within the 20 Hz to 20 KHz bandwidth. Embodiment may also be used to implement a rate converter having: 2 channels in a reverse path, such as for voice signals, 16-bit signal path per channel, an End-to-end SNR of 93 dB, all within 20 Hz to 20 KHz bandwidth. The rate converter may include sample rates such as 8, 11.025, 12, 16, 22.05, 24, 32 44.1, 48, and 96 KHz. Further, rate converters according to embodiments may include a gated clock in low-power mode to conserve power.

A processing element for implementation in a digital signal processing system is provided. The processing element is configured to receive a first data stream comprising a plurality of digital values where each value represents a sample of an analog signal. The processing element is further configured to receive a second data stream comprising a series of digital values where each value represents a sample of the analog signal. The processing element is configured to filter the first data stream via a first Farrow-structured fractional delay (FD) filter and output a filtered first data stream; filter the second data stream via a second Farrow-structured FD filter and output a filtered second data stream; and temporarily store values from the second data stream and output the stored values to the first Farrow-structured FD filter so that the stored values can be used to filter the first data stream.

A method is provided for resampling an audio-frequency signal in an audio-frequency signal encoding or decoding operation. The resampling is carried out by a method of interpolation of an order greater than one. The method is such that the interpolated samples are obtained by calculating a weighted average of possible interpolation values calculated over a plurality of intervals covering the time location of the sample to be interpolated. A resampling device is provided, which implements the method, and also an encoder and decoder including at least one resampling device.

The implementation of non-integer sample rate conversion and filtering of data sequences may be improved by performing both operations together with a system that includes a CIC filter and a control block that modifies internal states of the CIC filter. In one embodiment, input data samples provided at a first sample rate may be filtered by a CIC filter that includes a cascade of an integrating stage and a comb filter stage, each stage operating at a different sampling rate. A control block coupled to the CIC filter may modify at least one internal state of at least one of the integrating stage and comb filter stage of the CIC filter, wherein filtering by the CIC filter and modifying the at least one internal state causes the CIC filter to output data samples at a second sample rate unequal to the first sample rate.

Aspects of this disclosure relate to an asynchronous sample rate converter (ASRC) comprising a signal input configured to receive an input signal having one or more input signal values at a first sample rate, a first clock input configured to receive an input clock signal corresponding to the first sample rate, a signal output configured to provide an output signal having one or more output signal values at a second sample rate, a second clock input configured to receive an output clock signal corresponding to the second sample rate, a zero-padding circuit configured to add a plurality of zero values following at least one of the one or more input signal values, and a filter configured to generate the output signal, the output signal having one or more output signal values based on the input signal.