Patent classifications
H03H2021/0092
Adaptive Equalisation
This invention is designed for use in transmission of data between downhole module in a wellbore and a controlling module at the surface. The invention provides an apparatus for receiving data signals from a telemetry module comprising first and second adaptive equalisers, and in which in a first modulation mode the coefficients of the first adaptive equaliser are updated until an error signal falls below a predetermined threshold and in a second modulation mode the coefficients of the first adaptive equaliser are locked and coefficients of the second adaptive equaliser are updated to continually minimise an error signal in which the number of bits encoded by the symbols of the first signal in an initial modulation mode is fewer than the number of bits encoded by the symbols of the second signal in a subsequent modulation mode.
System and method for adaptive filter
In one embodiment, a method for training an adaptive filter includes receiving, by a processor from a device, an input signal and a training reference signal and determining a correlation matrix in accordance with the input signal, the training reference signal, and a filter type. The method also includes determining a plurality of coefficients in accordance with the correlation matrix and adjusting the adaptive filter in accordance with the plurality of coefficients.
EFFICIENT ARCHITECTURE FOR HIGH-PERFORMANCE DSP-BASED LONG-REACH SERDES
A digital signal processing (DSP)-based serializer-deserializer (SERDES) includes a first filter configured to mitigate inter-symbol interference (ISI) attributed to dispersion associated with a long-reach transmission medium. The SERDES includes a second filter configured to shape the ISI. The SERDES includes also includes a third filter coupled in parallel with the second filter and configured to reduce ISI attributed to reflections associated to both near-zero delays and long delays.
Efficient architecture for high-performance DSP-based long-reach SERDES
A digital signal processing (DSP)-based serializer-deserializer (SERDES) includes a first filter configured to mitigate inter-symbol interference (ISI) attributed to dispersion associated with a long-reach transmission medium. The SERDES includes a second filter configured to shape the ISI. The SERDES includes also includes a third filter coupled in parallel with the second filter and configured to reduce ISI attributed to reflections associated to both near-zero delays and long delays.
EFFICIENT ARCHITECTURE FOR HIGH-PERFORMANCE DSP-BASED LONG-REACH SERDES
A digital signal processing (DSP)-based serializer-deserializer (SERDES) includes a first filter configured to mitigate inter-symbol interference (ISI) attributed to dispersion associated with a long-reach transmission medium. The SERDES includes a second filter configured to shape the ISI. The SERDES includes also includes a third filter coupled in parallel with the second filter and configured to reduce ISI attributed to reflections associated to both near-zero delays and long delays.
COMMUNICATION SYSTEM, RECEIVER, EQUALIZATION SIGNAL PROCESSING CIRCUIT, METHOD, AND COMPUTER READABLE MEDIUM
A first filter performs compensation for first distortion being included in a reception signal being coherent-received, with respect to the reception signal and a complex conjugate signal of the reception signal, and outputs the reception signal and the complex conjugate signal that are subjected to compensation for the first distortion. A second filter being included in a filter group receives, as input signals, the reception signal and the complex conjugate signal that are subjected to compensation for the first distortion, performs compensation for second distortion being included in the reception signal, and outputs the reception signal being subjected to compensation for the second distortion. A coefficient updating means adaptively controls a filter coefficient of the second filter, based on a difference between an output signal being output from the filter group and a predetermined value of the output signal.