Patent classifications
H03K3/0231
RELAXATION OSCILLATOR THAT SAMPLES VOLTAGE DIFFERENCE BETWEEN VOLTAGES GENERATED BY RESISTOR-CAPACITOR CHARGING AND DISCHARGING FOR CONTROLLING OUTPUT CLOCK FREQUENCY OF CONTROLLABLE OSCILLATOR AND ASSOCIATED RELAXATION OSCILLATION METHOD
A relaxation oscillator includes a resistor-capacitor (RC) circuit, an integration capacitor, a sampling circuit, and a controllable oscillator. The RC circuit performs an RC charging operation to set a first voltage, performs an RC discharging operation to set a second voltage, and performs a reset operation to reset the first voltage to a first reference voltage and reset the second voltage to a second reference voltage. The sampling circuit performs a charge delivery operation to sample a voltage difference between the first voltage and the second voltage, and transfers the voltage difference to the integration capacitor. The controllable oscillator generates an output clock in response to a control input provided by the integration capacitor.
Combining voltage ramps to create linear voltage ramp
An improved ramp generator enables a very high degree of linearity in an output voltage ramp signal. Output ramps of the output voltage ramp signal are alternatingly produced from two preliminary ramp signals during alternating time periods. Preliminary ramps are produced at different preliminary ramp nodes that are alternatingly connected to an output node. The preliminary ramps continuously ramp during and in some cases beyond, e.g., before and/or after, the time periods. In some embodiments, switches alternatingly connect two capacitors to at least one current source, a reset voltage source, and the output node to alternatingly produce the preliminary ramps.
COMBINING VOLTAGE RAMPS TO CREATE LINEAR VOLTAGE RAMP
An improved ramp generator enables a very high degree of linearity in an output voltage ramp signal. Output ramps of the output voltage ramp signal are alternatingly produced from two preliminary ramp signals during alternating time periods. Preliminary ramps are produced at different preliminary ramp nodes that are alternatingly connected to an output node. The preliminary ramps continuously ramp during and in some cases beyond, e.g., before and/or after, the time periods. In some embodiments, switches alternatingly connect two capacitors to at least one current source, a reset voltage source, and the output node to alternatingly produce the preliminary ramps.
Oscillator circuit
An oscillator circuit is provided. A first and a second cycle generating units, and a first and a second duty generating units are included. An SR latch, receiving outputs the first and second cycle generating units. In the SR latch, an output is provided to the first cycle generating unit and the third duty generating, and a contemporary output is provided to the second cycle generating unit and the second duty generating unit. A logic circuit receives the outputs of the first and the second duty generating units and the output and the contemporary output of the SR latch to generate a clock signal. The first and the second cycle generating units are respectively operated to provide the even and odd cycle times of the clock signal. The first and the second duty generating units are respectively operated to provide the even and odd duties of the clock signal.
OSCILLATION CIRCUIT
An oscillation circuit includes first and second constant current circuits, first and second switch circuits, first and second MOS transistors, and an output port. The first constant current circuit is connected to one port of a capacitor. The first MOS transistor has a gate and a drain connected to the second constant current circuit and a source connected to another port of the capacitor. The second MOS transistor has a gate connected to the gate of the first MOS transistor, and a drain connected to the one port of the capacitor. The second switch circuit is connected between a source of the second MOS transistor and a second power supply terminal. The output port outputs a signal based on a voltage of the one port. Turn-on and turn-off of the first and second switch circuits are controlled by the signal of the output port and an inverted signal.
ENABLING AN EXTERNAL RESISTOR FOR AN OSCILLATOR
In an example, a system includes an oscillator circuit on a chip. The oscillator circuit includes a charging current generator including a current mirror, an amplifier, and an on-chip resistor, where the on-chip resistor is coupled to a pin on the chip. The oscillator circuit also includes oscillator circuitry coupled to the charging current generator, where the oscillator circuitry includes a comparator, a phase generator, a first capacitor coupled to a first resistor, and a second capacitor coupled to a second resistor. The system also includes an external resistor coupled to the pin, where the external resistor is external to the chip. The system includes an external capacitor coupled to the pin, where the external capacitor is external to the chip.
RELAXATION OSCILLATOR, INTEGRATED CIRCUIT AND ELECTRONIC APPARATUS
The present disclosure relates to a relaxation oscillator, an integrated circuit and an electronic apparatus, the relaxation oscillator comprising a first signal generation module and an oscillation module configured to output a first oscillation signal and a second oscillation signal, the first oscillation signal and the second oscillation signal being opposite in phase, the oscillation module comprising a first switch, a second switch, a capacitor, and a comparison unit. The oscillation module according to the disclosed embodiment using a floating amplifier to implement a comparator, where in a pre-charging stage, the first switch and the second switch are turned on to charge the capacitor, and a common mode of the first oscillation signal and the second oscillation signal is determined; in a comparing stage, the first switch and the second switch are turned off to output the oscillation signal. The embodiment of the present disclosure eliminates the need to provide an additional common mode feedback generation circuit, and does not require an increase in power consumption, achieving the advantages of smaller occupied area, lower power consumption, less noise, and better performance as compared with a relaxation oscillator of the related art.
RELAXATION OSCILLATOR, INTEGRATED CIRCUIT AND ELECTRONIC APPARATUS
The present disclosure relates to a relaxation oscillator, an integrated circuit and an electronic apparatus, the relaxation oscillator comprising a first signal generation module and an oscillation module configured to output a first oscillation signal and a second oscillation signal, the first oscillation signal and the second oscillation signal being opposite in phase, the oscillation module comprising a first switch, a second switch, a capacitor, and a comparison unit. The oscillation module according to the disclosed embodiment using a floating amplifier to implement a comparator, where in a pre-charging stage, the first switch and the second switch are turned on to charge the capacitor, and a common mode of the first oscillation signal and the second oscillation signal is determined; in a comparing stage, the first switch and the second switch are turned off to output the oscillation signal. The embodiment of the present disclosure eliminates the need to provide an additional common mode feedback generation circuit, and does not require an increase in power consumption, achieving the advantages of smaller occupied area, lower power consumption, less noise, and better performance as compared with a relaxation oscillator of the related art.
PIN-LEAKAGE COMPENSATION SCHEME FOR EXTERNAL RESISTOR-BASED OSCILLATORS
In an example, a system includes an oscillator circuit on a chip. The oscillator circuit includes a charging current generator including a current mirror and an amplifier, where the amplifier is coupled to a pin on the chip, and where the pin is adapted to be coupled to an external resistor, where the external resistor is external to the chip. The oscillator circuit also includes oscillator circuitry coupled to the charging current generator, where the oscillator circuitry includes a comparator, a phase generator, a first capacitor coupled to a first switch, and a second capacitor coupled to a second switch. The oscillator circuit includes leakage circuitry coupled to the current mirror, where the leakage circuitry is configured to draw a current from the current mirror proportional to a leakage current flowing through the external resistor from circuitry internal to the chip.
Low power free running oscillator
Various embodiments relate to a free running oscillator, including: a voltage controlled oscillator circuit including an input configured to receive an input voltage and an output configured to provide an oscillation signal, wherein the input voltage controls a frequency of the oscillation signal; a frequency to voltage circuit including an input configured to receive the oscillation signal and an output configured to produce a voltage dependent on a frequency of the oscillation signal; a comparison circuit including an input and an output comprising: a first amplifier including a first input, a second input, and an output, wherein the output is based upon a difference in voltage between the first input and the second input, wherein the first input received one of a reference voltage and the output of frequency to voltage circuit; a second amplifier including a first input, a second input, and an output, wherein the output is based upon a difference in voltage between the first input and the second input, first input is connected to the comparator output, the second inputs is connected to the second amplifier output; a sampling capacitor connected between the second input of the first amplifier and a ground; and an integration capacitor connected between the comparator output and the ground.