A pulse width modulated (PWM) amplifier includes a synchronization logic circuit having a first input configured to receive a bridge control signal and having a second input configured to receive a clock signal. The synchronization logic circuit is configured to provide a slope switch signal and a reference switch signal. The PWM amplifier includes a ramp generator having a first input configured to receive a first voltage supply and having a second input configured to receive a second voltage supply and having a third input configured to receive the reference switch signal and having a fourth input configured to receive the slope switch signal. The ramp generator is configured to provide a ramp signal having a first slope responsive to the slope switch signal in a first state and having a second slope responsive to the slope switch signal in a second state and to provide the clock signal.

A pulse width modulated (PWM) amplifier includes a synchronization logic circuit having a first input configured to receive a bridge control signal and having a second input configured to receive a clock signal. The synchronization logic circuit is configured to provide a slope switch signal and a reference switch signal. The PWM amplifier includes a ramp generator having a first input configured to receive a first voltage supply and having a second input configured to receive a second voltage supply and having a third input configured to receive the reference switch signal and having a fourth input configured to receive the slope switch signal. The ramp generator is configured to provide a ramp signal having a first slope responsive to the slope switch signal in a first state and having a second slope responsive to the slope switch signal in a second state and to provide the clock signal.

A ramp signal generation device includes a sampling circuit suitable for sampling a ramp current and storing a voltage corresponding to the sampled ramp current; a current maintaining circuit suitable for maintaining the ramp current; a current transferring circuit suitable for transferring a current corresponding to the voltage stored on the sampling circuit; and a current-to-voltage converter suitable for converting and generating a ramp voltage corresponding to the current transferred from the current transferring circuit.

A ramp signal generation device includes a sampling circuit suitable for sampling a ramp current and storing a voltage corresponding to the sampled ramp current; a current maintaining circuit suitable for maintaining the ramp current; a current transferring circuit suitable for transferring a current corresponding to the voltage stored on the sampling circuit; and a current-to-voltage converter suitable for converting and generating a ramp voltage corresponding to the current transferred from the current transferring circuit.

A power converter circuit included in a computer system may charge and discharge a switch node coupled to a regulated power supply node via an inductor. The power converter circuit may generate a reference clock signal using a system clock signal and a voltage level of the switch node. The reference clock signal may be used to initiate a charge cycle, whose duration may be based on generated ramp signals.

A power converter circuit included in a computer system may charge and discharge a switch node coupled to a regulated power supply node via an inductor. The power converter circuit may generate a reference clock signal using a system clock signal and a voltage level of the switch node. The reference clock signal may be used to initiate a charge cycle, whose duration may be based on generated ramp signals.

Provided is an electronic device including a ramp signal generation circuit configured to generate a ramp signal having a second slope that is greater by a first level than a first slope which corresponds to an analog gain, and a slope correction circuit configured to correct the second slope of the ramp signal by the first level to obtain the first slope.

Provided is an electronic device including a ramp signal generation circuit configured to generate a ramp signal having a second slope that is greater by a first level than a first slope which corresponds to an analog gain, and a slope correction circuit configured to correct the second slope of the ramp signal by the first level to obtain the first slope.

Provided is an electronic device including a ramp signal generation circuit configured to generate a ramp signal having a second slope that is greater by a first level than a first slope which corresponds to an analog gain, and a slope correction circuit configured to correct the second slope of the ramp signal by the first level to obtain the first slope.

Provided is an electronic device including a ramp signal generation circuit configured to generate a ramp signal having a second slope that is greater by a first level than a first slope which corresponds to an analog gain, and a slope correction circuit configured to correct the second slope of the ramp signal by the first level to obtain the first slope.