Aspects of this disclosure relate to reducing settling time of a sawtooth ramp signal in a phase-locked loop. Information from a loop filter of the phase-locked loop can be stored and used within the loop filter so as to improve the settling time of the sawtooth ramp signal. In certain embodiments, the settling time of a periodic sawtooth ramp signal can be reduced to less than one microsecond. An output frequency at the end of the sawtooth chirp can be brought back to an initial value without significantly modifying phase error in disclosed embodiments.

A ramp signal generator may include: a differential amplification unit suitable for generating an amplified signal corresponding to a voltage difference between a reference voltage and a feedback voltage; a driving unit suitable for driving an output terminal of the feedback voltage to a ground voltage in response to the amplified signal, and generating the feedback voltage corresponding to the reference voltage; and a ramp signal generation unit suitable for generating a ramp signal using a ramp supply voltage and the feedback voltage.

A ramp signal generator may include: a differential amplification unit suitable for generating an amplified signal corresponding to a voltage difference between a reference voltage and a feedback voltage; a driving unit suitable for driving an output terminal of the feedback voltage to a ground voltage in response to the amplified signal, and generating the feedback voltage corresponding to the reference voltage; and a ramp signal generation unit suitable for generating a ramp signal using a ramp supply voltage and the feedback voltage.

Provided is a buffer circuit that can realize a wide dynamic range, a reduced area, and a reduced power consumption amount while maintaining low output impedance. The buffer circuit includes a first transistor, a current source, a second transistor, an output terminal, and first and second capacitors. The first transistor has a gate to which an input signal is input. The current source is connected to one terminal of the first transistor. The second transistor is connected to the other terminal of the first transistor. The output terminal is connected to the one terminal or the other terminal of the first transistor. The first and second capacitors are between the current source and the gate of the second transistor. The first transistor, the second transistor, and the first capacitor form a first feedback circuit. The first transistor, the current source, and the second capacitor form a second feedback circuit.

Provided is a buffer circuit that can realize a wide dynamic range, a reduced area, and a reduced power consumption amount while maintaining low output impedance. The buffer circuit includes a first transistor, a current source, a second transistor, an output terminal, and first and second capacitors. The first transistor has a gate to which an input signal is input. The current source is connected to one terminal of the first transistor. The second transistor is connected to the other terminal of the first transistor. The output terminal is connected to the one terminal or the other terminal of the first transistor. The first and second capacitors are between the current source and the gate of the second transistor. The first transistor, the second transistor, and the first capacitor form a first feedback circuit. The first transistor, the current source, and the second capacitor form a second feedback circuit.

A ramp signal generator includes a resistor connected between an output node outputting a ramp signal that increases or decreases at a constant slope and a first power node which receives a first power voltage, and plural current cells. A cell current flows through each of the current cells to the first power node or the resistor. The current cells include a first current cell. The first current cell includes a first transistor connected between a first switching node and the output node, the cell current flowing to the resistor through the first transistor, a second transistor connected between the first switching node and the first power node, the cell current flowing to the first power node through the second transistor, and a negative feedback circuit that maintains a constant voltage at the first switching node.

A ramp signal generator includes a resistor connected between an output node outputting a ramp signal that increases or decreases at a constant slope and a first power node which receives a first power voltage, and plural current cells. A cell current flows through each of the current cells to the first power node or the resistor. The current cells include a first current cell. The first current cell includes a first transistor connected between a first switching node and the output node, the cell current flowing to the resistor through the first transistor, a second transistor connected between the first switching node and the first power node, the cell current flowing to the first power node through the second transistor, and a negative feedback circuit that maintains a constant voltage at the first switching node.