A method and an apparatus for controlling a threshold voltage are provided. The method includes receiving noise event signals from a sensing core, the sensing core sensing a portion of a moving object, and generating an event signal. The method further includes determining a type of the noise event signals, determining a number of the noise event signals based on the type of the noise event signals, determining whether the number of the noise event signals satisfies a condition, and controlling a threshold voltage value corresponding to the noise event signals in response to the determining that the number of the noise event signals does not satisfy the condition.

A data decoding method and device as well as an intelligent cipher key token are provided. The data decoding method includes: receiving a sinusoidal wave via an audio interface, wherein the sinusoidal wave has a waveform with at least one period, and different periods represent different bit values; processing the sinusoidal wave so as to obtain a first square wave, wherein the first square wave carries data to be decoded; determining whether there is a glitch waveform in the first square wave, based on a preset threshold or based on an adaptive threshold, wherein the adaptive threshold is calculated according to synchronization head data carried in the sinusoidal wave; if there is a glitch waveform in the first square wave, eliminating the glitch waveform from the first square wave so as to obtain a second square wave; and decoding the second square wave so as to obtain decoded data.

A comparator has an input stage having (i) resistor-coupled super source-follower circuits that convert differential input voltages into differential currents and (ii) hysteresis current-injection circuits that inject hysteresis currents into the differential currents. An output stage processes the differential currents to control the comparator output. Common-mode (CM) detection circuits inhibit some of the differential currents from reaching the output stage if the CM voltage is too close to a voltage rail of the comparator. The comparator is able to operate at CM voltages over the entire rail-to-rail range with constant hysteresis voltage.

The present invention is directed integrated circuits and methods thereof. More specifically, an embodiment of the present invention provides a comparator calibration loop where a digital integrator stores a running sum based on the output of a comparator. A DAC converts the running sum and generates an offset calibration voltage, which is filtered by a low-pass filter module, and the filtered offset calibration voltage is used to cancel out the intrinsic offset voltage and low frequency noise of the comparator. There are other embodiments as well.

The invention relates generating timing signals registering the passage of a component past a sensor. The invention relates particularly to the generation of timing signals in real time for health monitoring of a mechanical system, for example for detecting excessive distortion or vibration of rotor blades in a turbine. In a disclosed arrangement, a method is provided in which a the sensor is configured to output a signal that is dependent on a separation between a component and the sensor, and the method comprises: performing a first passage event integral of an output from the sensor over at least a portion of a first passage event of a reference component past the sensor; performing a second passage event integral of an output from the sensor over at least a portion of a second passage event of a component to be measured past the sensor, the second passage event occurring after the first passage event; and generating a timing signal when the second passage event integral is equal to a predetermined fraction of the first passage event integral. By integrating the signal, short noise pulses will not cause timing errors. Optionally, only a part of the received signal will be integrated, e.g. portions of the signal which are above the average value of the signal in a preceding period of time.

A method and an apparatus for controlling a threshold voltage are provided. The method includes receiving noise event signals from a sensing core, the sensing core sensing a portion of a moving object, and generating an event signal. The method further includes determining a type of the noise event signals, determining a number of the noise event signals based on the type of the noise event signals, determining whether the number of the noise event signals satisfies a condition, and controlling a threshold voltage value corresponding to the noise event signals in response to the determining that the number of the noise event signals does not satisfy the condition.

The present invention is directed integrated circuits and methods thereof. More specifically, an embodiment of the present invention provides a comparator calibration loop where a digital integrator stores a running sum based on the output of a comparator. A DAC converts the running sum and generates an offset calibration voltage, which is filtered by a low-pass filter module, and the filtered offset calibration voltage is used to cancel out the intrinsic offset voltage and low frequency noise of the comparator. There are other embodiments as well.

A fast response time, self-activating, adjustable threshold limiter including a limiting element LE, a first coupling element CE.sub.1 electrically connected from a signal node of LE to a control input of LE, and a second coupling element CE.sub.2 electrically connected from the control input of LE to a nominal node of LE. An initial bias (control) voltage is also supplied to the control input of LE to dynamically control the limiting threshold for the limiter. Embodiments include usage of self-activating adjustable power limiters in combination with series switch components in a switch circuit in lieu of conventional shunt switches.

A data reception chip coupled to an external memory including a first input-output pin to output first data and including a comparison module, a voltage generation module, a logic unit, a detection module and a switching module is provided. The comparison module is coupled to the first input-output pin to configure to receive the first data. The comparison module compares the first data with a first reference voltage to identify the value of the first data. The voltage generation module is configured to generate the first reference voltage. The logic unit is coupled to the comparison module and the voltage generation module and outputs at least one switching signal. The detection module detects the logic unit to generate at least one detection signal. The switching module transmits the detection signal to a test pin according to the switching signal.

A circuit includes a clock input node, a first signal input node configured to receive a first modulated signal switching between a first DC voltage and a second DC voltage, a bias circuit, a first output node, a first capacitor, a second capacitor, and switching circuitry coupled to the first capacitor and the second capacitor. Control circuitry is configured to initially set the switching circuitry in a first configuration in response to the first modulated signal having the second DC voltage, thereby charging the first capacitor to the second DC voltage and charging the second capacitor to the first DC voltage, and subsequently set the switching circuitry in a second configuration in response to an edge detected in the clock signal, thereby producing the first threshold voltage at the first output node after charge redistribution taking place between the first and second capacitors.